BiMOS biasing circuit

Details BiMOS biasing circuit BiMOS biasing circuit

1987-04-15

1988-10-25

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307297, 307446, 307544, 307570, 307572, 307304, 330288, 323314, H03K 301, H03K 1902, G05F 140, H03F 304

Patent

active

047806249

ABSTRACT:
The circuit comprises a first and a second transistor provided with the sources coupled to one end of a supply voltage and the gates coupled to one another, and a third and fourth transistor provided with the sources coupled to the other end of the supply voltage, the gates coupled to one another, the drains coupled to the respective drains of said first and second transistor, and the gates of the first and of the fourth transistor being furthermore shorted each with its own gate. The coupling between the drains of the first and of the third transistor is constituted by a preset resistor to the ends of which the base and the emitter of a bipolar transistor are coupled having the collector of the bipolar transistor coupled to one end of the supply voltage. The four transistors may be replaced by respective pairs of transistors suitably coupled to each other.

REFERENCES:
patent: 4558242 (1985-12-01), Tuthill et al.
patent: 4695750 (1987-09-01), Hara

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