Bimodal serial to parallel converter with bitslip controller

Details Bimodal serial to parallel converter with bitslip controller Bimodal serial to parallel converter with bitslip controller

2006-01-10

2006-01-10

Jeanglaude, Jean Bruner (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

Serial to parallel

C341S101000

Reexamination Certificate

active

06985096

ABSTRACT:
Method and apparatus for a bimodal serial to parallel converter is provided. A first stage of registers is clocked responsive to a clock signal, such as a forwarded clock signal of a synchronous interface. The first stage of registers is configurable in either a single serial shift chain or two serial shift chains. The former configuration is for Single Data Rate (“SDR”) data, and the latter configuration is for Double Data Rate (“DDR”) data. A bitslip controller is configured to provide a control select signal to selection circuitry. For DDR operation, the control signal is for selecting respective portions of outputs from the two serial shift chains for providing to a second stage of registers. For DDR operation, the second stage of registers is alternatively clocked responsive to a divided down version of the clock signal and another divided down version of the clock signal which is periodically stopped.

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