BiFET including a FET having increased linearity and...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor

Reexamination Certificate

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C257S192000, C257S020000, C257S024000, C257S272000, C257S273000, C257S274000

Reexamination Certificate

active

06906359

ABSTRACT:
According to one exemplary embodiment, a BiFET situated on a substrate comprises an emitter layer segment situated over the substrate, where the emitter layer segment comprises a semiconductor of a first type. The HBT further comprises a first segment of an etch stop layer, where the first segment of the etch stop layer comprises InGaP. The BiFET further comprises a FET situated over the substrate, where the FET comprises source and drain regions, where a second segment of the etch stop layer is situated under the source and drain regions, and where the second segment of the etch stop layer comprises InGaP. The FET further comprises a semiconductor layer of a second type situated under the second segment of the etch stop layer. The etch stop layer increases linearity of the FET and does not degrade electron current flow in the HBT.

REFERENCES:
Fresina et al.: “Selective Self-Aligned Emitter Ledge Formation for Heterojunction Bipolar Transistors,” IEEE Electron Device Letters, vol. 17, No. 12, Dec., 1996, pp. 555-556.
Fresina et al.: “InGaP/GaAs HBT with Novel Layer Structure for Emitter Ledge Fabrication,” IEEE, 0-7803-3393-4, 1996, pp. 207-210.

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