Bidirectional off-chip driver with receiver bypass

Details Bidirectional off-chip driver with receiver bypass Bidirectional off-chip driver with receiver bypass

1997-06-12

1999-09-07

Ton, My-Trang Nu

Miscellaneous active electrical nonlinear devices, circuits, and

Gating

Converging with plural inputs and single output

327 99, H03K 1762

Patent

active

059492724

ABSTRACT:
A method and apparatus are provided which are implemented in a chip I/O buffer-multiplexor circuit or I/O buffer cell 201. The I/O buffer portion includes a receiver circuit 205 for receiving bus input signals to the buffered chip, and a driver circuit 203 for driving output signals from the buffered chip to a data bus. An integrated multiplexor or MUX circuit 207 selectively gates one of three possible signals to chip internal logic. The three signals applied to the MUX circuit include a boundary scan test signal BS MUX for testing scan points in an integrated circuit, a bypass Data In signal DI which is generated by chip internal drive logic, and a DQ signal received by the I/O buffer receiver circuit from a data bus. The data input node of the I/O buffer is wired directly to the new multiplexor data input. Additional control signals are provided for orthogonal selection of the three multiplexor data inputs.

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