Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Utilizing three or more electrode solid-state device
Reexamination Certificate
1999-12-06
2002-07-30
Flynn, Nathan J. (Department: 2826)
Miscellaneous active electrical nonlinear devices, circuits, and
Gating
Utilizing three or more electrode solid-state device
C327S405000, C327S419000, C327S482000, C257S524000, C257S525000, C257S526000
Reexamination Certificate
active
06426667
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
This invention relates to an analogue switch, and more specifically to an analogue switch including at least one bipolar transistor, in an integrated circuit. The invention also relates to an integrated circuit including such a transistor.
BACKGROUND OF THE INVENTION
EP-0615287 describes an integrated bipolar transistor. As is conventional, this device is made up of regions of semiconductor material, in which conduction takes place by the movement of particles of negative (N) and positive (P) conductivity types. In the case of an NPN bipolar transistor, a collector tub (or well) of N-type material is formed. Formed within the collector tub is a collector connection region of more heavily doped (N
+
) N-type material, as well as a base region of P-type material. An emitter region of N
+
type material is formed within the base region.
In order to provide electrical isolation between this device and other devices in the integrated circuit, this whole device is surrounded by a layer of insulated material such as silicon dioxide. However, a disadvantage of this structure is that, even when the device is switched on, there is a potentially significant minimum voltage drop from collector to emitter. This is known as the saturation voltage, and is normally of the order of 100-200 mV, which is very much higher than the corresponding voltage drop across a conducting CMOS device.
When a bipolar transistor is saturated, the switching speed of the transistor becomes relatively slow.
EP-0615287 therefore describes a device which attempts to allow faster recovery from saturation. Specifically, that document discloses locating, on the surface of the N-type collector well, a region of P-type semiconductor material, which is connected to a grounding electric potential.
SUMMARY OF THE INVENTION
The present invention relates to a device structure of the same general type of that described above, but in which the saturation voltage is sought to be reduced. More specifically, according to a first aspect the invention provides an integrated NPN bipolar transistor formed with oxide insulation, in which the normal direction of current flow is from the emitter to collector. According to a second aspect the invention provides an integrated PNP bipolar transistor formed with oxide insulation, in which the normal direction of current flow is from the collector to emitter.
In each case, these directions are the reverse of the normal directions of current flow.
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Goldman Richard
Miles David
Burns Doane Swecker & Mathis L.L.P.
Flynn Nathan J.
Quinto Kevin
Telefonaktiebolaget LM Ericsson (publ)
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