Fishing – trapping – and vermin destroying
Patent
1987-02-20
1988-03-29
Ozaki, George T.
Fishing, trapping, and vermin destroying
437 26, 437 33, 437 47, 437 57, 437163, 437164, H01L 21383, H01L 21425
Patent
active
047343826
ABSTRACT:
A bipolar/CMOS process includes bipolar transistors having emitters formed in less than a minimal masking dimension. An opening is formed through a polycrystalline silicon layer deposited on a silicon substrate. After coating the sides of the opening with silicon dioxide, the intrinsic base region of the bipolar transistor and the emitter region are implanted. The extrinsic base is formed by outdiffusion from the polycrystalline silicon layer. The structure includes an epitaxial layer which is more strongly doped below its surface than at its surface to enhance the performance of CMOS transistors formed therein. Additionally, the bipolar and complementary MOS transistors are self-aligned to each other by the manner in which the buried layers are formed.
REFERENCES:
patent: 4381953 (1983-05-01), Ho et al.
patent: 4484388 (1984-11-01), Iwasaki et al.
patent: 4507847 (1985-04-01), Sullivan
patent: 4512816 (1985-04-01), Ramde et al.
patent: 4521952 (1985-06-01), Riseman
patent: 4531282 (1985-07-01), Sakai et al.
patent: 4536945 (1985-08-01), Gray et al.
Colwell Robert C.
Fairchild Semiconductor Corporation
Ozaki George T.
Patch Lee
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