Amplifiers – With semiconductor amplifying device – Including differential amplifier
Patent
1996-03-12
1997-12-30
Mottola, Steven
Amplifiers
With semiconductor amplifying device
Including differential amplifier
330300, H03F 345, H03F 316
Patent
active
057035334
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
Integrated operational amplifiers for switch/capacitor (SC) circuits were formerly realized purely using CMOS technology. However, these circuits require more chip area and generally require a greater outlay than BiCMOS amplifiers. It is possible to achieve higher bandwidths and higher output impedances with BiCMOS amplifiers by virtue of the better analog properties with regard to transconductance and output impedance of a bipolar transistor compared with an MOS transistor. By additionally using bipolar transistors which have a higher transconductance than MOS transistors, amplifiers having a high bandwidth and high gain can be realized considerably more easily and with a lower area requirement. MOS transistors are voltage-controlled components, whereas bipolar transistors are current-controlled components. When coupling bipolar transistors to an MOS amplifier stage, therefore, special circuit techniques are required in order to guarantee the operating points of the bipolar transistors even in the event of fluctuations in the production process.
An operational amplifier of the generic type is disclosed in IEEE Journal Of Solid-State Circuits, vol. 26, No. 3, March 1991, New York US, pages 203 to 208.
Furthermore, the American patent specification U.S. Pat. No. 3 644 838 discloses an operational amplifier in which use is made of an IGFET instead of a lateral bipolar transistor in order to increase the pass bandwidth.
SUMMARY OF THE INVENTION
The invention is based on the object, then, of specifying a BiCMOS operational amplifier which has a high input impedance as well as a high bandwidth, is particularly suitable for SC circuits and, above all, ensures the maintenance of the operating points of the bipolar transistors in the output path of the operational amplifier even when technological fluctuations are taken into account.
In general terms the present invention is a BiCMOS operational amplifier for switch/capacitor circuits. There is provided an MOS differential amplifier stage, which is supplied with a reference current by a current source and which has a load element in each of the two paths of the MOS differential amplifier stage. Two output paths are provided which each comprise a series circuit formed by a further load element and two bipolar transistors, the respective bipolar transistors forming a cascade. The base of each of the bipolar transistors is supplied with a first reference voltage and one of the further load elements is connected to an output of the operational amplifier, characterized in that a respective bipolar transistor of a respective cascade can be driven, via a respective PMOS transistor to whose respective gate a second reference voltage is applied, directly by a voltage across the load element of the respective path of the MOS differential amplifier stage.
Advantageous developments of the present invention are as follows.
The reference current through the MOS differential amplifier stage is selected such that it is less than or equal to the respective currents in the output paths. The output of the operational amplifier is fed back to an output of the MOS differential amplifier stage via a compensation capacitance.
The load elements in the output paths each have a transistor and these transistors are connected in the form of a current mirror. The load element connected to the output of the operational amplifier has an additional load element which is connected in series with the respective transistor of the current mirror.
The additional load element consists of an MOS transistor whose gate can be driven by a third reference voltage.
The current source for the reference current consists of a PMOS transistor whose gate can be driven by a fourth reference voltage.
The first, second, third and fourth reference voltages can be formed in a reference unit. The first reference voltage is applied to the base of a first bipolar transistor, the emitter of which transistor is connected to an external reference potential via a first NMOS transistor, the co
REFERENCES:
patent: 5028881 (1991-07-01), Jackson
patent: 5477190 (1995-12-01), Brehmer et al.
Georgakos Georg
Kleine Ulrich
Nebel Gerhard
Mottola Steven
Siemens Aktiengesellschaft
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