BiCMOS logic circuit with self-boosting immunity and a method th

Details BiCMOS logic circuit with self-boosting immunity and a method th BiCMOS logic circuit with self-boosting immunity and a method th

1990-08-01

1992-08-18

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307555, 307443, 307451, 307456, 307560, 307300, 36518906, H03K 1902, H03K 333

Patent

active

051401924

ABSTRACT:
A BiCMOS logic circuit with self-boosting immunity comprises a resistor, first and second transistors, a switching portion, and a discharge portion. The resistor and first transistor bias the switching portion to first and second reference voltages, which may be equal. The second transistor is a bipolar transistor providing an output signal to a load. The switching portion couples the bias voltage provided by the resistor and the first transistor to the base of the second transistor in response to a true result of a logic operation on at least one input signal and couples the base of the second transistor to a second power supply voltage terminal in response to a false result of the logic operation. The discharge portion couples the output signal to a logic low or pulldown voltage in response to a false result of the logic operation. In one form, the logic operation is a logical inversion of an input signal. In this case, the switching portion may be provided by a P-channel MOS transistor having first and second current electrodes connected serially between the bias signal and the base of the second transistor, with a gate receiving the input signal.

REFERENCES:
patent: 4746817 (1988-05-01), Banker et al.
patent: 4825108 (1989-04-01), Burton et al.
patent: 4866674 (1989-09-01), Tran
patent: 4877978 (1989-10-01), Platt
patent: 4897564 (1990-01-01), Chen
Tran et al.; An 8ns BiCMOS 1Mb ECL SRAM with a Configurable Memory Array Size; 1989 IEEE Solid State Circuits Conf. pp. 36-37.
Kertis et al.; A 12ns 256K BiCMOS SRAM; 1989 IEEE Solid State Circuits Conference, pp. 186-187.
Burnet and Hu; Hot-Carrier Degradation in Bipolar Transistors at 300 and 110 K--Effect on BiCMOS Inverter Performance; IEEE Transactions on Electron Devices, vol. 37 #4 Apr. 1990 pp. 1171-1174.

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