BiCMOS logic circuit having a rapid output voltage falling-down

Details BiCMOS logic circuit having a rapid output voltage falling-down BiCMOS logic circuit having a rapid output voltage falling-down

1989-09-26

1991-01-15

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307570, 307451, 307443, H03K 19017, H03K 1704, H03K 19092, H03K 1712

Patent

active

049856456

ABSTRACT:
A BiCMOS logic circuit includes a MOS logic circuit connected between a high voltage supply line and a low voltage supply line and having an input connected to an input terminal, and an output circuit composed of first and second bipolar transistors connected in series between the high and low voltage supply lines. The first bipolar transistor has a base connected to an output of the MOS logic circuit, and a connection node of the first and second bipolar transistors is connected to an output terminal. In addition, a base current supplying circuit having first and second MOS transistors is connected in series between the first voltage supply line and a base of the second bipolar transistor. The first MOS transistor has a gate connected to the output of the MOS logic circuit, and the second MOS transistor has a gate connected to the input terminal.

REFERENCES:
patent: 4638186 (1987-01-01), McLaughlin
patent: 4649294 (1987-03-01), McLaughlin
patent: 4694202 (1987-09-01), Iwamura et al.
patent: 4694203 (1987-09-01), Uragami et al.
patent: 4769561 (1988-09-01), Iwamura et al.
patent: 4779014 (1988-10-01), Masuoka et al.
patent: 4806797 (1989-02-01), Yamazaki
patent: 4902914 (1990-02-01), Masuoka

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