Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1990-05-15
1991-11-26
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307570, 307469, 364716, H03K 1901, H03K 19003, H03K 19082, H03K 19094
Patent
active
050685481
ABSTRACT:
In one embodiment of the invention, an inverter inverts an input signal and provides this inverted input signal into the base of an NPN bipolar transistor, acting as a pull-up device, whose collector is coupled to a positive power supply voltage. The input signal coupled to the input of the inverter is also coupled to the gate of a large N-channel MOSFET, acting as a pull-down device, having its drain coupled to the emitter of the bipolar transistor and its source coupled to ground. The common node of the bipolar transistor and the N-channel MOSFET provides the output signal of the driver. This driver uses much less area than a standard two-bipolar transistor BiCMOS driver with substantially equal performance. A small P-channel MOSFET having its gate connected to the input signal may be connected across the base and emitter of the bipolar transistor to provide a full output voltage at the output of the driver.
REFERENCES:
patent: 4649294 (1987-03-01), McLaughlin
patent: 4701642 (1987-10-01), Pricer
patent: 4791320 (1988-12-01), Kawata et al.
patent: 4804868 (1989-02-01), Masuda et al.
"BiCMOS Circuit Technology for a High--Speed SRAM," by Douseki et al., IEEE Journal of Solid--State Circuits, vol. 23, No. 1, Feb. 1988.
"Characterization of Speed and Stability of BiNMOS Gates with a Bipolar and PMOSFET Merge Structure," by Momose et al., published in IEDM, 1990.
A. Watanabe, "Future BiCMOS Technology for Scaled Supply Voltage," 1989, IEEE IEDM, pp. 16.5.1-16.5.4.
T. Hanibuchi, "A Bipolar--PMOS Merged Basic Cell for 0.8 um BiCMOS Sea--of--Gates," IEEE 1990 CICC, pp. 4.2.1-4.2.4.
K. Kumagai, "A 150 K Gate 250 ps BiCMOS SOG with an Emitter--Followed CMOS (EMOS) Cell," IEEE 1990 CICC, pp. 4.3.1-4.3.4.
A. Alverez, "BiCMOS Technology and Applications," pp. 237-238, After Feb. 16, 1989.
A. El Gamal (Applicant), "BiNMOS: A Basic Cell for BiCMOS Sea--of--Gates," Paper (4 pages).
T. Hayashi, "SDC Cell-- A Novel CMOS/BiCMOS Design Methodology for Mainframe Arithmetic Module Generation," IEEE 1989, CICC, May 15, 1989, pp. 17.7.1-17.7.4.
W. Chin, "Push--Pull Driver Using Bipolar and Complementary Metal--Oxide Semiconductor Devices," IBM Technical Disclosure Bulletin, vol. 16, No. 11, Apr. 1974, pp. 3570-3571.
W. Pricer, "Combination CMOS/Bipolar Driver for High Capacitance,+ IBM Technical Disclosure Bulletin," vol. 27, No. 4A, Sep. 1984, pp. 1974-1975.
T. Sunaga, "Merged Bipolar--CMOS Device," IBM Technical Disclosure Bulletin, vol. 28, No. 8, Jan. 1986, pp. 3558-3561.
A. Wong et al., "A High Density BiCMOS Direct Drive Array," IEEE 1988 Custom Integrated Circuits Conference, pp. 20.6.1-20.6.3.
H. Fukuda et al., "A BiCMOS Channelless Masterslice with On--Chip Voltage Converter," International Solid State Circuits Conference 1989, Feb. 16, 1989, pp. 176-177.
El Gamel, Abbas et al., "BiNMOS: A Basic Cell for BiCMOS--Sea--of--Gates", dated May 15, 1989.
Watanabe et al., "Future BiCMOS Technology for Scaled Supply Voltage", Dec. 30, 1989 in IEDM'89.
Bertelson David R.
Miller Stanley D.
SiArc
LandOfFree
BiCMOS logic circuit for basic applications does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with BiCMOS logic circuit for basic applications, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and BiCMOS logic circuit for basic applications will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2387642