BICMOS latch circuit for latching differential signals

Details BICMOS latch circuit for latching differential signals BICMOS latch circuit for latching differential signals

1996-04-01

1998-06-02

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327 55, 327200, 327223, H03K 312

Patent

active

057606269

ABSTRACT:
A data value is passed from a bus (50) to a receiver (40) without a propagation delay. A data latch (10) stores the data value while the data value is being generated by the bus (50). The data latch (10) then holds the data value and provides the data value to the receiver (40) after the data value is no longer present on the bus (50). The data latch (10) has a data storage circuit (11), a diode clamping circuit (12), and a current sourcing circuit (13). The data value is stored by the data storage circuit (11) by a feed-back loop circuit.

REFERENCES:
patent: 4644185 (1987-02-01), Todd
patent: 4792923 (1988-12-01), Nakase et al.
patent: 4825100 (1989-04-01), Caspell
patent: 4831287 (1989-05-01), Golab
patent: 5079452 (1992-01-01), Lain et al.
patent: 5140199 (1992-08-01), Seo
patent: 5343428 (1994-08-01), Pilo et al.

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