BiCMOS input circuit for detecting signals out of ECL range

Details BiCMOS input circuit for detecting signals out of ECL range BiCMOS input circuit for detecting signals out of ECL range

1990-04-02

1992-08-04

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307451, 307455, H03K 19092, H03K 19094

Patent

active

051361892

ABSTRACT:
A BiCMOS input circuit which is capable of detecting signals below a particular range, such as ECL signals, is presented. The circuit is useful in conserving the number of pins in a BiCMOS integrated circuit in that a signal below normal ECL levels can trigger special functions, such as testing. The circuit has a plurality of CMOS inverter circuits connected in series with the input node of the first inverter connected to the input terminal of the circuit and the output node of the last inverter circuit connected to the output terminal of the circuit. Diode-connected bipolar transistor created a potential difference between V.sub.CC and the source electrode of PMOS transistor of each CMOS inverter circuit in a declining fashion from the first inverter to the last inverter. The last inverter circuit has no potential difference at all so that its output has a full CMOS swing.

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patent: 4897564 (1990-01-01), Chen
patent: 4958091 (1990-09-01), Roberts
patent: 4978870 (1990-12-01), Chen et al.

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