Bicmos gate array

Details Bicmos gate array Bicmos gate array

1988-09-02

1989-11-07

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307303, 307465, 307469, H03K 1901

Patent

active

048794805

ABSTRACT:
In an input level converter for TTL - CMOS level conversion (or other conversion to CMOS) for an internal logic block operating with CMOS levels, an output transistor for executing the charge or discharge of the output capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the input level converter can be lessened. Similarly, in an output level converter for CMOS - TTL level conversion (or other conversion from CMOS) for the internal logic block operating with the CMOS levels, an output transistor for executing the charge or discharge of the output load capacitance thereof is formed of a bipolar transistor. Thus, the propagation delay times and their capacitance-dependencies of the output level converter can also be lessened.

REFERENCES:
patent: 3879619 (1975-04-01), Pleshko
patent: 4161662 (1979-07-01), Malcolm et al.
patent: 4255672 (1981-03-01), Ohno et al.
patent: 4301383 (1981-11-01), Taylor
patent: 4363107 (1982-12-01), Ohhashi et al.
patent: 4523106 (1985-06-01), Tanizawa et al.
Taub and Schilling, Digital Integrated Electronics, pub. by McGraw-Hill Book Co., New York, 1977, pp. 90-91, 98-101, 113-119 and 278-282.
Lin et al., "Complementary MOS-Bipolar Transistor Structure", IEEE Teld, vol. Ed-16, No. 11, Nov. 1969, pp. 945-951.

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