Bicmos decoder

Details Bicmos decoder Bicmos decoder

1989-05-03

1990-08-28

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307570, 307449, H03K 1901, H03K 19003, H03K 19082, H03K 19094

Patent

active

049528238

ABSTRACT:
A bipolar/CMOS decoder circuit for providing a decoded output signal includes a plurality of pull-up gate circuits (14a) and a pull-down circuit (16). Each of the gate circuite (14a) is formed of a pull-up P-channel MOS transistor (P1), a pull-down N-Channel MOS transistor (N1), and a pull-up bipolar transistor (Q1). The pull-down circuit (16) is formed of a single pull-down current source, N-channel MOS transistor (N.0.). The bipolar transistors and CMOS transistors are merged in a common semiconductor substrate in order to form the decoder circuit which has a high noise margin and low pattern sensitivity even with a large number of inputs.

REFERENCES:
patent: 4800303 (1989-01-01), Graham et al.
patent: 4804868 (1989-02-01), Masada et al.
patent: 4837462 (1989-06-01), Watanabe et al.
patent: 4868421 (1989-09-01), Herndon et al.
patent: 4882534 (1989-11-01), Koshizuka
patent: 4902914 (1990-02-01), Masuoka
patent: 4912347 (1990-03-01), Morris

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