BICMOS binary logic circuits

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307451, 307454, 307570, 307246, H03K 1704

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active

047016426

ABSTRACT:
A BICMOS binary logic circuit or system is provided which includes P-channel and N-channel transistors, a bipolar transistor having a base connected to the drain of the P-channel transistor, a diode, preferably a Schottky barrier diode, connected between the emitter of the bipolar transistors and the drain of the N-channel transistor, a capacitor load connected to the emitter of the bipolar transistor and an input terminal connected to control electrodes of the P-channel and N-channel transistors.

REFERENCES:
patent: 3217181 (1965-11-01), Zuk
patent: 3541353 (1970-11-01), Seelbach et al.
patent: 3636372 (1972-01-01), Hujita et al.
patent: 4069428 (1978-01-01), Reedy
patent: 4159450 (1979-06-01), Hoover
patent: 4301383 (1981-11-01), Taylor
patent: 4425516 (1984-01-01), Wanlass
patent: 4558234 (1985-12-01), Suzuki et al.
"Merged Bipolar-CMOS Device"; IBM-TDB; vol. 28, No. 8, pp. 3558-3561; 1/1986.
IBM Technical Disclosure Bulletin, vol. 16, No. 11, Apr. 1974, pp. 3570-3571, "Push-Pull Device Using Bipolar and Complementary Metal-Oxide Semiconductor Devices," by W. B. Chin.
IBM Technical Disclosure Bulletin, vol. 27, No. 4A, Sep. 1984, pp. 1974-1975, "Combination CMOS/Bipolar Driver for High Capacitance", by W. D. Pricer.
Electronics Week, Nov. 5, 1984, pp. 17 and 18, "Cells Combine CMOS, Bipolar Transistors", by C. L. Cohen.

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