Biasing scheme for improving latitudes in the tri-level xerograp

Details Biasing scheme for improving latitudes in the tri-level xerograp Biasing scheme for improving latitudes in the tri-level xerograp

1991-10-07

1993-08-31

Grimley, A. T.

Photocopying

Contact printing

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355208, 355245, G03G 1501

Patent

active

052413586

ABSTRACT:
The operating latitude of the tri-level xerographic process is improved by replacing the standard DC bias that is applied to one or both of the developer housings in conventional tri-level imaging with a chopped DC (CDC) developer bias. Chopped DC biasing is the alternate application of two discrete bias voltages to a developer strucrute in a periodic fashion at a given frequency, with the period of each cycle divided up between the two bias levels at a duty cycle of from 5-10% or 90-95% depending upon which of the two developer structures is being biased. In the case of the DAD developer structure the duty cycle of higher of the two biases is 5-10% and in the case of a CAD developer structure the duty cycle of higher of the two biases is 90-95%.

REFERENCES:
patent: 4265197 (1981-05-01), Toyono et al.
patent: 4337306 (1982-06-01), Kanbe et al.
patent: 4610531 (1986-09-01), Hayashi et al.
patent: 4797335 (1989-01-01), Hiratsuki et al.
patent: 4998139 (1991-03-01), May et al.
patent: 5003351 (1991-03-01), Waki et al.

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