Biasing scheme for GAASFET amplifier

Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement

Reexamination Certificate

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Details

C330S300000, C330S302000

Reexamination Certificate

active

06218904

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of amplifiers using field effect transistor (FET) stages, and in particular to a biasing circuit that is usefully employed in low noise amplifiers operating at microwave frequencies, e.g. at least as high as 1 GHz.
BACKGROUND TO THE INVENTION
A low noise amplifier is typically used to amplify the received signal from an antenna at microwave frequencies. A block diagram of a system which uses a single stage low noise amplifier (LNA) as a first receiver block in such a system is shown in FIG.
1
(
a
). An antenna sub-assembly
1
is comprised of an antenna
3
which feeds a low noise amplifier
5
. A coaxial cable carries an amplified signal from the LNA to a receiver unit
9
, and in particular typically to an anti-aliasing RF filter
11
, which feeds its output to an RF amplifier
13
of the receiver unit.
FIG.
1
(
b
) is a block schematic of a system which uses a two stage LNA in the antenna sub-assembly. An antenna
3
feeds a first stage LNA
5
, which feeds an anti-aliasing filter
11
, which feeds an RF amplifier
15
. The output of amplifier
15
is carried by a coaxial cable
7
to a receiver unit
17
, which applies its input signal to an amplifier mixer, etc.
GAAS and PHEMPT GAAS FET transistors are currently widely used in LNAs at frequencies of 1 GHz and higher. Such devices are of relatively low cost and offer very low noise and high gain at moderate currents and voltages.
The LNA is generally wideband relative to the signal bandwidth and usually does not impose limitation on signal modulation or architecture on the balance of the receiver system. For example, the LNA could be used for a narrow band quadrature phase-shift key (QPSK) system, or for a wideband direct sequence spread spectrum system, provided only that any in-line filters have sufficient bandwidth to pass the entire signal spectrum (as is the usual case).
Power consumption of the individual stages of such amplifiers is typically 10 mA from a 5V power supply; multiple stages increase the current draw proportionally. While this current draw is considered to be moderate as compared with earlier technology, it represents a substantial drain for battery powered equipment such as hand held global positioning system (GPS) receivers. It would therefore be desirable to reduce the current consumption.
A PHEMPT FET, when operated at a drain current of about 10 mA, has a negative gate to source voltage typically between 0.1V and 0.4V. If the source is grounded, it becomes necessary to bias the gate negatively with respect to ground to achieve the desired bias current. This is commonly achieved by the used of capacitive pump circuits which generate negative bias voltages. The PHEMPT gate input impedance (at DC) is very high and thus the input bias current is very low and the bias circuit current consumption can be made relatively low.
Variation in the source to gate threshold for GAAS FET transistors is not well controlled and consequently, additional control circuitry is required to regulate the bias current which flows in the circuit. Commonly, the negative bias voltage provided by the capacitive pump circuit simply provides the necessary biasing voltages and additional circuitry is required to implement the bias current control.
FIG.
2
(
a
) is a schematic diagram which shows a means of biasing a PHEMPT FET without a negative bias pump. An FET receives an RF input signal at its gate. A high value resistor
23
is connected between the gate and ground, and another resistor
25
, bypassed by a capacitor
27
, is connected between its source and ground. A power source is connected to ground and is coupled to the drain of the FET.
This circuit relies on a degeneration resistor
25
connected to the source to control the bias current. A major disadvantage of this simple circuit is that the variation in gate threshold for PHEMPT FET devices is very poor, leading to wide tolerance of current draw.
FIG.
2
(
b
) illustrates a biasing circuit which makes use of a negative bias device. An FET
21
has its input AC coupled (e.g. via capacitor
29
) to the RF input. Its source is grounded. A capacitive pump
31
generates a DC voltage negative with respect to ground and provides it from its output to the gate of the FET via resistor
33
. Capacitor
35
AC bypasses the output of pump
31
to ground.
However, in this case where a two stage LNA is to be employed, at least double the single stage typically 10 mA current is drawn.
While GAAS FETs and PHEMPT GAAS FETs are capable of operation at extremely high frequencies, it is important to provide well controlled AC source impedances at all ports up to the maximum frequency of operation to prevent spurious oscillations. For that reason, to achieve such control it is common practice to connect the GAAS FET source directly to the ground plane.
SUMMARY OF THE INVENTION
I have invented a way of approximately halving the current used in a two stage LNA. The invention involves using the same DC current in both stages of the amplifier. While the design superficially may resemble a cascode amplifier, the present invention is significantly different therefrom by the AC signal and DC current feed conduction paths being separate from each other. In a cascode circuit, while two transistors are stacked so that DC current flows through both transistors wherein the drain of one transistor feeds the source of the other, the current of one transistor modulates the source-drain current of the other. Thus the AC signal and DC conduction paths are not decoupled. In the present invention, the AC signal and DC conduction paths are decoupled, which provides significant advantages, as will be described later.
Further, the source of the first LNA FET can be biased to an arbitrary DC potential. This allows the DC path to be separated from the AC path, and in the present invention, the bias current in the second stage also flows in the first stage, thereby halving the current requirements.
An advantage of an embodiment of the present invention is that only one negative feedback stage is necessary to establish the bias current in both first and second stages of the LNA.
Another advantage is that the available supply voltage is “shared” between the FETs in the two stages, resulting in a very low drop-out voltage.
Another advantage is that the bias current is “used” twice, resulting in current consumption only half of that which would be required by a conventional circuit.
Another advantage is that the negative gate threshold of the first LNA FET allows its gate to be biased at ground, but which still provides sufficient “voltage headroom” for another transistor in series to act as a constant current sink.
Another advantage is that a single control node can be used to power down both stages of the LNA for power saving applications.
Another advantage is that the bias control is extremely precise because it is solely determined by resistor values and is independent of PHEMPT FET parameter variation.
In accordance with an embodiment of the present invention, a bias circuit for a pair of field effect transistor (FET) stages comprises a circuit for AC coupling a signal amplified by a first stage to the input of a second stage, a power source for supplying DC operating current to both of the stages in series, a circuit for sensing current drawn by the second stage and in response thereto for controlling bias of the first stage, and a circuit for blocking AC signals amplified by the first stage from being passed via DC operating current path to the second stage, whereby the same DC operating current is passed through both first and second stages and is blocked from passing through the AC coupling circuit.
In accordance with another embodiment, the bias circuit includes a circuit for comparing a voltage derived from the sensed current with a bandgap voltage and for raising or reducing bias as a result of any difference therebetween.
In accordance with another embodiment, the bias circuit includes a circuit for controlling a charge pump from said sensed

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