Biasing circuit for sense amplifier

Details Biasing circuit for sense amplifier Biasing circuit for sense amplifier

1991-10-08

1992-12-29

Sikes, William L.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307355, 307359, 307362, 36518906, 36518911, 365205, 365208, H03F 345, H03K 522

Patent

active

051754517

ABSTRACT:
When a common source line of sense amplifiers in a semiconductor memory device is pulled down via a pull-down transistor, a current level signal indicative of the level of the current which flows through the pull-down transistor is generated. The current level signal is compared with a reference level signal indicative of an allowable maximum level of the current which flows through the pull-down transistor. When the current level signal exceeds the allowable maximum level, the pull-down transistor is controlled to reduce the current flowing therethrough.

REFERENCES:
patent: 4453092 (1984-06-01), Joseph
patent: 4692642 (1987-09-01), Fukuzo et al.
patent: 4775808 (1988-10-01), Trumpp
patent: 4910455 (1990-03-01), Nadd
E. Kume et al., "Experiment on Multi-Phase Driving of Sense Amplifiers" Spring National Conference on the Institute of Electronics, Information and Communication Engineers, (1988) p. 2-289.
T. Yabe et al., "Drivability Stabilized Output Buffer for LSI with an On-Chip Power Supply" Autumn National Conference of the Institute of Electronics, Information and Communication Engineers, (1990) p. 5-235.

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