Biasing circuit for a field effect transistor

Details Biasing circuit for a field effect transistor Biasing circuit for a field effect transistor

1985-01-17

1987-08-11

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307571, 307304, 307264, 323315, 330277, 330296, H03K 17284, H03K 17687, H03G 1104, H04B 304

Patent

active

046863877

ABSTRACT:
A circuit for biasing a field effect transistor using two voltages. With said circuit, the bias point of the transistor may be varied by varying the source bias voltage. At least one access electrode is polarized from a bias voltage through a first secondary transistor operating as saturable load. The gate of the main transistor and the gate of the saturable load are connected at two points of a divider bridge, supplied by the two bias voltages and comprising at least two resistors and a second secondary transistor. The gate-source voltage of said saturable load follows the gate-source voltage of said main transistor.

REFERENCES:
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patent: 4338572 (1982-07-01), Schurmann
patent: 4459498 (1984-07-01), Stengl et al.
patent: 4550274 (1985-10-01), Weber
Shlyehkov, "Operating Point Stabilization in a Series Fed Amplifier Stage Comprising Field Effect and Bipolar Transistors", Telecommunication and Radio Engineering, vol. 29, No. 8, Aug. 1975.

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