Bias voltage offset circuit

Details Bias voltage offset circuit Bias voltage offset circuit

2008-01-08

2008-01-08

Shalwala, Bipin (Department: 2629)

Computer graphics processing and selective visual display system

Display driving control circuitry

Display power source

C345S210000, C345S212000, C323S265000, C365S189090

Reexamination Certificate

active

10939182

ABSTRACT:
A bias offset voltage circuit for controlling one or more devices is disclosed. The bias offset voltage circuit includes a three voltage sources connected in series and a switching element. Each voltage source includes a positive terminal and a negative terminal. The switching element includes a positive input terminal, a negative input terminal, and an output terminal. The negative terminal of the first voltage source is connected to the negative input terminal. The positive terminal of the third voltage source is connected to the positive input terminal. The terminals of the second voltage source are used to drive a first device. The output terminal of the switching element drives a second device. The bias offset voltage circuit may be used to provide proper voltages to each of the devices where the higher-supplied voltage could damage the device supplied with the lower supplied voltage, or vice versa.

REFERENCES:
patent: 4126854 (1978-11-01), Sheridon
patent: 4143103 (1979-03-01), Sheridon
patent: 5111196 (1992-05-01), Hunt
patent: 5179652 (1993-01-01), Rozmanith et al.
patent: 5185857 (1993-02-01), Rozmanith et al.
patent: 5250789 (1993-10-01), Johnsen
patent: 5389945 (1995-02-01), Sheridon
patent: 5473146 (1995-12-01), Goodwin, III
patent: 5500721 (1996-03-01), Randall et al.
patent: 5604027 (1997-02-01), Sheridon
patent: 5723204 (1998-03-01), Stefik
patent: 5751257 (1998-05-01), Sutherland
patent: 5936259 (1999-08-01), Katz et al.
patent: 5981970 (1999-11-01), Dimitrakopoulos et al.
patent: 6047263 (2000-04-01), Goodwin, III
patent: 6161122 (2000-12-01), Hawkes
patent: 6194837 (2001-02-01), Ozawa
patent: 6253190 (2001-06-01), Sutherland
patent: 6265243 (2001-07-01), Katz et al.
patent: 6311308 (2001-10-01), Adamec
patent: 6317724 (2001-11-01), Goodwin, III et al.
patent: 6343273 (2002-01-01), Nahan et al.
patent: 6373453 (2002-04-01), Yudasaka
patent: 6442531 (2002-08-01), Goodwin, III
patent: 6469617 (2002-10-01), Goodwin, III et al.
patent: 6496805 (2002-12-01), Goodwin, III et al.
patent: 6502219 (2002-12-01), Adamec
patent: 6518949 (2003-02-01), Drzaic
patent: 6551717 (2003-04-01), Katz et al.
patent: 6581828 (2003-06-01), Forsythe et al.
patent: 2001/0022597 (2001-09-01), Yoshida
patent: 2003/0016566 (2003-01-01), Yamaki et al.

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