Bias generation circuit and voltage controlled oscillator

Details Bias generation circuit and voltage controlled oscillator Bias generation circuit and voltage controlled oscillator

2011-08-16

2011-08-16

Kinkead, Arnold (Department: 2817)

Oscillators

Frequency stabilization

Temperature or current responsive means in circuit

C331S185000, C331S183000, C330S296000, C327S536000, C327S538000, C323S273000, C365S189090

Reexamination Certificate

active

07999628

ABSTRACT:
This invention includes a bias origination section configured to originate an original bias voltage; a comparison section configured to compare the original bias voltage and a comparison voltage, and output a comparison result; a resistive divider section composed by a resistance circuit including a variable resistor section having a resistor and a switch, and configured to generate the comparison voltage; a bias decision control section configured to determine bias decision data for controlling a resistance value of the variable resistor section so as to bring the comparison voltage close to the original bias voltage, based on a comparison result of the comparison section; and a storage section configured to hold the bias decision data and also output the comparison voltage as a bias voltage by controlling a resistance value of the variable resistor section based on the held bias decision data, thereby generating a low-noise bias with a small area.

REFERENCES:
patent: 6356161 (2002-03-01), Nolan et al.
patent: 6624706 (2003-09-01), Higashi et al.
patent: 6891443 (2005-05-01), Rashid
patent: 7268633 (2007-09-01), von Kaenel
patent: 7327201 (2008-02-01), Miyashita et al.
patent: 2008/0303603 (2008-12-01), Kousai et al.
Daisuke Miyashita, et al., “A Phase Noise Minimization of CMOS VCOs over Wide Tuning Range and Large PVT Variations”, IEEE 2005 Custom Integrated Circuits Conference, Sep. 2005, pp. 583-586.

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