Bias controllers and methods for enhanced system efficiency

Details Bias controllers and methods for enhanced system efficiency Bias controllers and methods for enhanced system efficiency

2006-01-17

2006-01-17

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Converter compensation

C327S535000

Reexamination Certificate

active

06987471

ABSTRACT:
Bias controllers are provided which alter a bias control signal so that a bias signal (e.g., a current signal) of an electronic network rapidly responds to increases in the rate-of-change of the network's analog input signal. This enhances the linearity of a system that includes the electronic network. Subsequent decreases in the rate-of-change are sensed and a decrease of the bias control signal is then paced at a rate selected to ignore short-term rate-of-change variations (e.g., modulation variations) but follow longer-term rate-of-change reductions to thereby enhance system efficiency without sacrificing system linearity.

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Okaniwa, Yusuke, “A CMOS Clocked Comparator for High-Speed Serial Communication”, 2004 Symposium on VLSI Circuits, Digest of Technical Papers, pp. 198-201.

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