Bias circuit to reduce flicker noise in tunable LC oscillators

Oscillators – Solid state active element oscillator – Transistors

Reexamination Certificate

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Details

C331S185000

Reexamination Certificate

active

08031020

ABSTRACT:
In one embodiment, the present invention includes noise reduction circuits and methods. In one embodiment, cross coupled switching transistors incorporate bias voltages between the control terminal of each transistor and the drain of the other transistor. The bias voltages increase the voltage on each transistors drain terminal and reduce noise upconversion in the system. In one embodiment, the source voltages of each transistor may be increased to linearize the circuit and further reduce noise. In another embodiment, a current is coupled to a PN junction to generate a low noise bias voltage. The bias voltage is used to bias capacitors of a selectively activated and deactivated capacitance to reduce noise. Features and advantages of the present invention may be implemented in an oscillator circuit, which may be used in a communication system, for example.

REFERENCES:
patent: 6091307 (2000-07-01), Nelson
patent: 6680655 (2004-01-01), Rogers
patent: 6867658 (2005-03-01), Sibrai et al.
patent: 7116183 (2006-10-01), Wu
patent: 7199698 (2007-04-01), Goldfarb
patent: 7336138 (2008-02-01), Kitamura et al.

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