Bias circuit for use with low-voltage power supply

Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement

Reexamination Certificate

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Details

C330S288000, C330S291000

Reexamination Certificate

active

06515546

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to a circuit for biasing a transistor, and, more particularly, to a transistor bias circuit that is capable of operating from a power supply that produces a voltage that is only slightly higher than twice the base-emitter voltage of the transistor that is to be biased.
BACKGROUND OF THE INVENTION
Modern wireless communications devices, such as cellular telephones, are held to ever-higher performance standards. Transmissions must be clear and undistorted, and the battery in the devices must be small and have a long life. In order to meet these consumer requirements, wireless telephone designers have moved away from using traditional silicon-based bipolar transistors as power amplifiers and toward using more exotic transistors, such as heterojunction bipolar transistors (“HBTs”) made of aluminum-gallium-arsenide/gallium-arsenide (“AlGaAs/GaAs”) and indium-gallium-phosphide/gallium-arsenide (“InGaP/GaAs”). Such HBTs provide outstanding power efficiency and high linearity, thus enabling cellular phones to achieve longer battery life and better signal characteristics for voice and data.
Of course, an HBT, like a bipolar junction transistor (“BJT”), requires a direct-current current (“DC”) bias signal (comprising both a voltage and a current) to be applied to its input terminal to establish its operating point. (The operating point of a transistor may be defined as the point on the transistor's characteristic curves at which the transistor will operate in the absence of an input signal. See, e.g., John Markus, Electronics Dictionary 445 (4th ed. 1979). Because changes in the DC bias signal affect the operating point of the HBT (and thus adversely affect the linearity of the amplifier), the DC bias signal must be very stable (preferably within 5% to 15%) and unaffected by variations in temperature or in the power supply voltage. Such a DC bias signal is normally generated by a “bias circuit.”
A known bias circuit is shown in FIG.
1
. Transistor Q
2
is a transistor that is to be biased. The circuit comprises: transistor Q
1
, which is preferably matched to transistor Q
2
and is connected to transistor Q
2
in a current-mirror configuration; reference resistor R
1
; feedback transistor Q
3
; base resistors R
2
and R
3
, which control the amount of bias current supplied to transistors Q
1
and Q
2
; and pull-down resistor R
4
.
In this circuit, resistor R
1
establishes a reference current I
CM
(for example, 1 milliampere) that passes through transistor Q
1
. Because transistors Q
1
and Q
2
are connected in a current-mirror configuration, the reference current I
CM
is mirrored in the matching transistor Q
2
as current I
RF
. If transistors Q
1
and Q
2
are matched, the circuit will be relatively insensitive to fluctuations in temperature, since the temperature characteristics of transistors Q
1
and Q
2
will be substantially the same.
Feedback through transistor Q
3
and resistor R
2
stabilizes reference current I
CM
to compensate for fluctuations in reference voltage V
REG
, in temperature, or in the parameters of the transistors. For example, if reference voltage V
REG
increases, the voltage at the base of transistor Q
3
, and subsequently the voltage at the emitter of transistor Q
3
, also increases. Consequently, the amount of current flowing into the base of mirrored transistor Q
1
correspondingly increases. The collector-emitter voltage of transistor Q
1
therefore decreases, pulling down the voltage at the collector of transistor Q
1
to a value close to what it had been before reference voltage V
REG
increased.
Transistors Q
2
and Q
3
and resistors R
1
and R
2
thus form a negative feedback loop that provides a stable bias voltage at the emitter of transistor Q
3
and an accordingly stable current through resistor R
3
into the base of transistor Q
2
, the transistor to be biased. The effectiveness of the feedback is directly impacted by the amount of gain in the loop. Here, the total loop gain is close to the gain of transistor Q
1
and is proportional to the size of resistor R
1
: the larger the size of resistor R
1
, the more gain there is in the loop and the smaller the loop error will be.
But a serious problem exists with the bias circuit of FIG.
1
. Because transistors Q
1
and Q
3
are “stacked”, the circuit operates well only from a power supply voltage that is substantially higher than twice the base-emitter voltage of the transistors. An example is the case where (1) the transistors in FIG.
1
. are InGaP/GaAs or AlGaAs/GaAs HBTs (which require a base-emitter voltage (V
BE
) of about 1.33 V in order to operate); and (2) the power supply voltage is about 3.0 V, which is two-and-a-quarter times the base-emitter voltage of the transistors. Because the emitters of transistors Q
1
and Q
2
in this circuit are connected to ground (0 V), the voltage at the base of transistor Q
1
and the voltage at the base of transistor Q
2
must be at least about 1.33 V in order for them to operate. Since the voltage drop across resistor R
2
(and also across RF choke L
1
and resistor R
3
) is neglible, the voltage at the emitter of transistor Q
3
must therefore be likewise about 1.33 V.
Similarly, transistor Q
3
must have a voltage difference of 1.33 V between its base and its emitter. That is, the base of transistor Q
3
must be at a voltage potential that is 1.33 V higher than the voltage potential at its emitter. But since, as described above, the voltage at the emitter of transistor Q
3
must be at least 1.33 V in order for transistors Q
1
and Q
2
to operate, the voltage at the base of transistor Q
3
must be at least 2.66 V above ground potential (1.33 V at the emitter of transistor Q
3
plus the 1.33 V emitter-base junction voltage of transistor Q
3
), for transistor Q
3
to operate.
Furthermore, in order for the voltage at the base of transistor Q
3
to be 2.66 V, the voltage drop across resistor R
1
must be about 0.34 V (the supply voltage of 3.0 V minus the necessary voltage at the base of transistor Q
3
of 2.66 V=0.34 V). If the desired current I
CM
is 1 mA, for example, then the resistance of resistor R
1
would be about 340 ohms (R=V/I=0.34 V/1 mA=340 ohms).When resistor R
1
is 340 ohms, the gain in the feedback loop formed by transistors Q
1
and Q
3
and resistors R
1
and R
2
—which, as described above, is proportional to the size of resistor R
1
—is generally sufficient to provide an adequately stable bias voltage and current to transistor Q
2
.
The feedback in the bias circuit of
FIG. 1
becomes quickly ineffective, however, if the power supply voltage is lowered from substantially higher than twice the base-emitter voltage of the transistors in the circuit to a value only slightly higher than two times their base-emitter voltage. An example of such a supply voltage is 2.7 V, where the transistors in the circuit are HBTs having V
BE
=1.33 V. This supply voltage, 2.7 V, is the power supply voltage that is available in modem cellular telephones. In order for the circuit of
FIG. 1
to function from a 2.7 V supply voltage, it becomes necessary to reduce the size of resistor R
1
. The resistance of resistor R
1
for this case may be calculated as follows: the supply voltage of 2.7 V minus the necessary bias voltage of 2.66 V is 0.04 V. If current I
CM
is desired to be 1 mA, resistor R
1
must be 40 ohms (R=0.04 V/1 mA=40 ohms).
Thus, the size of resistor R
1
when the power supply voltage is 2.7 V (40 ohms) must be more than eight times smaller than the size of resistor R
1
when the power supply voltage is 3.0 V (340 ohms). When resistor R
1
is as small as 40 ohms, however, the gain in the feedback loop, which is proportional to the size of resistor R
1
, also is small, and, as a practical matter, is insufficient to compensate adequately for variations in temperature and power supply voltage. In other words, if the temperature or power supply voltage varies by even a small amount, the DC bias signal produced by the bias circuit

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