Amplifiers – With semiconductor amplifying device – Including field effect transistor
Patent
1981-12-11
1983-12-06
Mullins, James B.
Amplifiers
With semiconductor amplifying device
Including field effect transistor
330296, H03F 316
Patent
active
044196326
ABSTRACT:
Disclosed is a circuit for biasing FETs which limits unwanted gate current. A first resistor (R.sub.8) is coupled in series with the gate and the output (14) of a differential amplifier (12). Means such as a second resistor (R.sub.9) and a Zener diode (D.sub.2) are coupled to the first resistor and one input of the differential amplifier. Means such as a third resistor (R.sub.3) is also coupled to one input of the amplifier. When excessive gate current appears, the voltage across the first resistor is such as to cause sufficient current flow through the diode and second and third resistors to unbalance the amplifier. This keeps the gate-to-source voltage of the FET at a region of gate current below some maximum value.
REFERENCES:
patent: 3564442 (1971-02-01), Germann
patent: 3987369 (1976-10-01), Yokoyama
patent: 4126830 (1978-11-01), Schade, Jr.
patent: 4320352 (1982-03-01), Rubin et al.
Bell Telephone Laboratories Incorporated
Birnbaum Lester H.
Mullins James B.
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