Bias circuit for high-swing cascode current mirrors

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Details

C327S543000, C323S315000, C330S288000

Reexamination Certificate

active

11103813

ABSTRACT:
A bias circuit for providing at least first and second bias signals for biasing a cascode current source and/or a cascode current sink includes a resistive element and first, second and third transistors, each transistor having first and second source/drain terminals and a gate terminal. The first source/drain terminal of the first transistor is coupled to the gate terminal, the first bias signal being generated at the first source/drain terminal in response to receiving a first reference current at the first source/drain terminal. A first end of the first resistive element is coupled to the second source/drain terminal of the first transistor. The gate terminal of the second transistor is coupled to the gate terminal of the first transistor, the second bias signal being generated at the first source/drain terminal of the second transistor in response to receiving a second reference current at the first source/drain terminal of the second transistor. The first source/drain terminal of the third transistor is coupled to the second source/drain terminal of the second transistor, the second source/drain terminal of the third transistor is coupled to a second end of the first resistive element, and the gate terminal of the third transistor is coupled to the first source/drain terminal of the second transistor.

REFERENCES:
patent: 5180967 (1993-01-01), Yamazaki
patent: 5359296 (1994-10-01), Brooks et al.
patent: 5680038 (1997-10-01), Fiedler
patent: 6169456 (2001-01-01), Pauls
patent: 6194886 (2001-02-01), D'Aquino et al.
patent: 6897717 (2005-05-01), Eddleman et al.
patent: 6965270 (2005-11-01), Ross
patent: 7078974 (2006-07-01), Matsushita et al.
patent: 2004/0104765 (2004-06-01), Ebner
V.C. Vincence et al., “A High-Swing MOS Cascode Bias Circuit,” IEEE Transactions on Circuits and Systems-II: Analog and Digital Signal Processing, vol. 47, No. 11, pp. 1325-1328, Nov. 2000.

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