Bias circuit for FET

Details Bias circuit for FET Bias circuit for FET

1975-11-10

1977-06-21

Rolinec, Rudolph V.

Amplifiers

Signal feedback

Combined with control of bias voltage of signal amplifier

330 13, 330 17, 330 22, H03F 316

Patent

active

040314820

ABSTRACT:
A bias circuit particularly adapted for use with a field effect transistor whereby the drain bias current of the field effect transistor is maintained constant in the event of fluctuations in the operating voltage applied to the field effect transistor by a power supply. The bias circuit changes the gate bias voltage applied to the FET as a function of the fluctuations in the operating voltage to thereby restore the drain bias current to a constant value. A variable impedance is included in the bias circuit, the variable impedance being voltage dependent such that its impedance varies as the voltage applied thereto varies in accordance with a hyperbolic relation. The voltage applied to the variable impedance is derived from, and thus includes the fluctuations in, the operating voltage. The hyperbolic relation between the impedance and the voltage applied to the variable impedance effectively matches the relation between the pinch-off voltage V.sub.P and the amplification constant .mu. of the FET.

REFERENCES:
patent: 2858379 (1958-10-01), Stanley
patent: 3533003 (1960-10-01), Plaszczynski
patent: 3921089 (1975-11-01), Tsurushima
Danilovic et al., "Voltage Stabilization of the Source Follower Operating Point", Electronic Engineering, pp. 221-223; Feb. 1969.

Affiliated with

Also associated with

Rating

Bias circuit for FET does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Bias circuit for FET, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Bias circuit for FET will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-739377