Bias circuit for complementary transistors

Details Bias circuit for complementary transistors Bias circuit for complementary transistors

1977-08-22

1979-08-07

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307255, 307310, H03K 100, H03K 1760

Patent

active

041639081

ABSTRACT:
A monolithic amplifier circuit including a differential stage, a differential-to-single ended converter stage, a bias circuit and complementary push-pull output transistors is disclosed. The bias circuit is comprised of a current supply, two semiconductor bias devices and two current sinks. The junctions of the bias devices are connected in series across the junctions of the complementary output transistors to provide bias and to compensate for temperature and process variations in the output transistors. One of the bias devices and one of the current sinks are connected in one parallel path and the other bias device and the other current sink are connected in another parallel path through which most of the current from the current supply flows. This parallel connection enables utilization of minimum geometry bias devices in addition to facilitating precise and predictable control of the bias voltages and currents.

REFERENCES:
patent: 3660773 (1972-05-01), Free
patent: 3740657 (1973-06-01), Tharmaratnam
patent: 3809929 (1974-05-01), Vittoz
patent: 4077013 (1978-02-01), Morez et al.

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