Bias circuit for a wideband amplifier driven with low voltage

Amplifiers – With semiconductor amplifying device – Including particular biasing arrangement

Reexamination Certificate

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C330S311000

Reexamination Certificate

active

07397309

ABSTRACT:
An amplifier includes a ground, first and second MOS transistors, a first resistive load and a supply voltage, which are connected in series in this order. A bias circuit provides first and second bias voltages to the gate electrodes of the first and second transistors, respectively. The bias circuit includes a third MOS transistor having its gate and drain electrode diode-connected. The drain electrode of the third transistor provides the first bias voltage of the amplifier. The bias circuit further includes fourth and fifth MOS transistors, and a second resistive load, which are connected in series in this order. The second resistive load is connected to the supply voltage. The fourth transistor has its gate electrode connected to the drain electrode of the third transistor. The fifth transistor has its gate and drain electrodes diode-connected. The drain electrode of the fifth transistor provides the second bias voltage.

REFERENCES:
patent: 6873830 (2005-03-01), Katakura et al.
patent: 6977553 (2005-12-01), Jin et al.
Thomas H. Lee, “The Design of CMOS Radio-Frequency Integrated Circuits”, Cambridge University Press, pp. 164-166 and pp. 288-292, 1998.
Paul R. Gray and Robert G. Meyer, “Analysis and Design of Analog Integrated Circuits”, Baifukan, Japan, pp. 286-289, Oct. 20, 2000.
Masamitsu Kawakami, “General Network Analysis I; Linear Constant (1)”, Corona Publishing Co., Ltd., Japan, pp. 72-77.

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