Bias circuit for a photodetector, and an optical receiver

Details Bias circuit for a photodetector, and an optical receiver Bias circuit for a photodetector, and an optical receiver

2001-12-06

2004-03-16

Luu, Thanh X. (Department: 2878)

Radiant energy

Photocells; circuits and apparatus

Photocell controlled circuit

C250S2140LS

Reexamination Certificate

active

06707024

ABSTRACT:

TECHNICAL FIELD
The present invention generally relates to an optical receiver used in optical communications, and particularly relates to a bias circuit for a photodetector, which controls a bias voltage of the photodetector installed in an optical receiver.
BACKGROUND TECHNOLOGY
FIG. 1
is a block diagram showing an overview configuration of an optical receiver that employs 3R methods that have conventionally been used. 3R methods are commonly understood to provide optical signal processing means for regenerating an input signal (1R), reshaping a waveform of the regenerated signal (2R) and retiming the regenerated signal (3R) in accordance with a clock factor extracted from the input signal.
As shown in
FIG. 1
, this optical receiver includes a photodetector
3
that changes an optical signal into an electric current, a bias circuit
5
that supplies a bias voltage to the photodetector
3
, an equalizing amplifier
7
that is connected to the photodetector
3
, a timing extraction unit
9
that is connected to the equalizing amplifier
7
and an discrimination unit
11
that is connected to the equalizing amplifier
7
and the timing extraction unit
9
.
In the optical receiver, while the equalizing amplifier
7
transforms the electric current outputted from the photodetector
3
into a voltage, the signal that has been changed into voltage is amplified. Further, the signal outputted from the equalizing amplifier
7
is supplied to the timing extraction unit
9
and the discrimination unit
11
.
The timing extraction unit
9
reproduces a clock signal corresponding to a bit rate of a data signal supplied from the equalizing amplifier
7
, which is supplied to the discrimination unit
11
and an external point.
Moreover, the discrimination unit
11
reproduces the data signal supplied from the equalizing amplifier
7
by digital discernment based on the supplied clock signal, and carries out an external output.
FIG. 2
is a graph showing a relation between an electric current amplification factor and an optical input level of an avalanche photo diode (APD) used as the photodetector
3
shown in FIG.
1
. In addition, since this APD has the electric current amplification effect according to the bias voltage, it is used in the optical receiver
1
that requires raising an input sensitivity.
As shown in
FIG. 2
, in an APD, a bias voltage is adjusted so that the electric current amplification factor M may become as high as ten to about 20 at the minimum light-receiving level P
1
, while the electric current amplification factor M becomes as low as about between one and three at the maximum light-receiving level P
2
, securing a wide dynamic range. Here,
FIG. 2
shows a controlling example.
FIG. 3
is a graph showing a relation between the electric current amplification factor M and a bias-voltage VAPD of an APD, which is used as the photodetector
3
as shown in FIG.
1
. As shown in
FIG. 3
, where the bias-voltage VAPD is about 5V or less, the electric current amplification factor M is one or less and electric current amplification is not carried out, and when the bias-voltage VAPD is near a breakdown-voltage VB, the electric current amplification factor M is about 20. In addition, when receiving an optical signal at the minimum light-receiving level P
1
at an APD, it is common to set the bias-voltage VAPD at around 90% of the breakdown-voltage VB.
FIG. 4
is a circuit diagram showing a conventional APD bias circuit using resistors, which has been disclosed by JP, 7-245540.
As shown in
FIG. 4
, the APD bias circuit using the resistor is a circuit for stabilizing the electric current amplification factor M of the photodetector
3
, and is equipped with resistors R
1
and R
2
that are connected in series to the photodetector
3
which consists of an APD, a power-node NVDD connected to the resistor R
1
, and a bias control circuit
12
connected to the power-node NVDD.
Further, the bias control circuit
12
includes a voltage V
0
control circuit
13
that is connected to a node NV
0
, a voltage V
0
monitor circuit
15
connected to the node NV
0
and the voltage V
0
control circuit
13
, a temperature-control circuit
19
connected to the voltage V
0
monitor circuit
15
, an offset circuit
21
connected to the temperature-control circuit
19
, a temperature sensor
23
connected to the temperature-control circuit
19
, and an internal regulated power supply
17
connected to the voltage V
0
monitor circuit
15
, the offset circuit
21
and the temperature sensor
23
.
Moreover, a voltage V
0
control circuit
13
includes a transistor TR
1
and resistors R
4
-R
6
. Moreover, the voltage V
0
monitor circuit
15
includes an operational amplifier AMP
1
, a capacitor C
1
, and resistors R
7
-R
9
. Moreover, the temperature-control circuit
19
includes an operational amplifier AMP
2
and a variable resistor R
10
. Moreover, the offset circuit
21
includes a variable resistor R
11
and resistors R
12
and R
13
. And the temperature sensor
23
includes a diode D
1
and resistors R
14
and R
15
.
The APD bias circuit such as above supplies a bias voltage to the APD from a high-voltage power supply through the power-node NVDD and the resistors R
1
and R
2
, and operates to hold the voltage V
0
constant by monitoring the voltage V
0
of the node NV
0
. Here, the voltage V
0
and the electric current I
0
passing through the resistor R
1
have the following relations.
And this APD bias circuit controls the bias-voltage VAPD of the photodetector
3
using a voltage drop of the resistors R
1
and R
2
, which varies according to an optical power inputted into the photodetector
3
. Moreover, even when the electric current IAPD, which passes through the photodetector
3
, changes according to the inputted optical power, the electric current I
CONT
is controlled so that electric current I
0
maintains a fixed amount of the electric current.
V
0
=
VDD−I
0
·
R
  (1)
I
0
=I
CONT
+IAPD
  (2)
Here, VDD expresses a voltage supplied to the power-node NVDD from the above-mentioned high-voltage power supply, R expresses a resistance value of the resistor R
1
, I
CONT
expresses a magnitude of an electric current supplied to the voltage V
0
control circuit
13
and the voltage V
0
monitor circuit
15
from the node NV
0
, and IAPD expresses a magnitude of an electric current which flows the photodetector
3
.
And this APD bias circuit controls the bias-voltage VAPD of the photodetector
3
using a voltage drop of the resistors R
1
and R
2
, which varies according to an optical power inputted into the photodetector
3
. Moreover, even when the electric current IAPD, which flows the photodetector
3
, changes according to the inputted optical power, the electric current I
CONT
is controlled so that electric current I
0
maintains a fixed amount of the electric current.
In this manner, the voltage V
0
is held at a predetermined voltage when the optical power inputted into the photodetector
3
changes and electric current IAPD changes.
Moreover, the bias-voltage VAPD actually impressed to the APD, and the electric current IAPD that flows according to the optical power inputted satisfy following simultaneous equations.
IAPD=e·&lgr;·&eegr;·M·P
in
/(
h·c
)  (3)
M=IAPD
/(
IAPD
−(
VAPD/VB
)
n
)  (4)
Here, e expresses the electric charge [c] of an electron, &lgr; expresses a wavelength [&mgr;m] of input light, &eegr; expresses a quantum efficiency [%], M expresses an electric current amplification factor of an APD, P
in
expresses an average input light power [w], c expresses the velocity of light [m/s], and h expresses the Planck's constant [J-s]. Furthermore, n expresses a fitting coefficient of the APD.
According to the above-mentioned formula (3) and (4), if the input light power P
in
increases, the voltage drop in the resistor R
2
by the electric current IAPD will become large, causing the bias-voltage VAPD to decrease, and the electr

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