Amplifiers – With semiconductor amplifying device – Including differential amplifier
Reexamination Certificate
2007-04-03
2007-04-03
Mottola, Steven J. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including differential amplifier
Reexamination Certificate
active
11007234
ABSTRACT:
Output circuit in which electric current consumption of operational amplifiers therein is reduced and distortion of the output waveforms of the operational amplifiers is also reduced. A bias circuit30is constituted from a bias current source31, a bias voltage extracting circuit22, a precharge circuit34, and a precharge power supply35. When a timing signal Tp of a predetermined pulse width is supplied to the bias circuit30, MOS transistors28and29in the precharge circuit34are turned on during the period of its pulse width, and desired precharge voltages Vpn and Vpp are charged to capacitors Cn and Cp from the precharge power supply35.The voltages charged to the capacitors Cn and Cp are supplied to operational amplifiers through an N-bias line11and a P-bias line12as bias voltages VbiasA and VbiasB, respectively, so that the operational amplifiers are controlled to be biased at high biases. The bias voltages VbiasA and VbiasB after precharging transition from high to low according to CR time constant curves for the discharge paths of the capacitors Cn and Cp. This transition period can be set by adjusting the precharge voltages using the variable precharge power supply35.
REFERENCES:
patent: 6717468 (2004-04-01), Jeong et al.
patent: 9-93055 (1997-04-01), None
patent: 2003-66919 (2003-03-01), None
McGinn IP Law Group PLLC
Mottola Steven J.
NEC Electronics Corporation
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