Bias circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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C327S561000

Reexamination Certificate

active

06707333

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a bias circuit operating without any effect of variations in circuit elements caused in a manufacturing process, for supplying a bias voltage with high accuracy to A/D converters and the like.
2. Description of the Prior Art
FIG. 15
is an illustration of a differential amplifier using a conventional bias circuit. This figure shows an equivalent circuit of the differential amplifier in operation. In
FIG. 15
, reference numeral
100
denotes a current source; R
1
and R
2
each denotes a resistor having a resistance value of R; I denotes a current flowing in the resistors R
1
and R
2
; and M
11
and M
12
each denotes transistors. Reference sign Vip represents a positive input voltage and Vin represents a negative input voltage, both of which are differential voltages inputted to the differential amplifier. Reference sign Vop represents a positive output voltage and Von represents a negative output voltage, both of which are differential voltages outputted from the differential amplifier.
FIG. 16
is an illustration of the conventional bias circuit. The bias circuit of this figure is, e.g., a Vth-referenced bias circuit shown in Gray, Mayer 4th Edition, P. 311. In
FIG. 16
, reference signs M
3
to M
6
denote transistors; R
3
denotes a resistor having a resistance value of R; I denotes a current flowing in the resistor R
3
; and Vgs represents a gate-source voltage of the transistor M
5
. Further, the relation Vgs=R·I holds herein.
Next, the operation will be discussed.
The input/output characteristic of the differential amplifier shown in
FIG. 15
is expressed by the following equation (1):
Vop
-
Von
=
-
RIss

Vip
-
Vin
2
·
Veff

2
-
(
Vip
-
Vin
)
2
2
·
Veff
2
(
1
)
where Veff represents a saturation voltage of the differential amplifier shown in FIG.
15
.
FIG. 17
is an illustration showing the input/output characteristic of the differential amplifier. In
FIG. 17
, the vertical axis indicates a value of Vop-Von and the horizontal axis indicates a value of Vip-Vin. The input/output characteristic of Eq. (1) is as shown in FIG.
17
and the input range of the differential amplifier is in the range of 2. Veff at the DS operating point. The saturation voltage Veff is defined by the following equation (2):
Veff
=
Vgs
-
Vth
=
Iss
β
(
2
)
In Eq. (2), Vth represents a threshold voltage of transistors determining an output range, such as the transistors M
11
and M
12
in the differential amplifier of
FIG. 15
, and &bgr; is a constant. Thus, the input range of the conventional bias circuit depends on the gate-source voltage Vgs during operation of the transistors M
11
and M
12
and the threshold voltage Vth which the transistors M
11
and M
12
originally have from the time of manufacture.
With the above-discussed constitution, the conventional bias circuit has a problem that the input range of the differential amplifier can not be set to a predetermined value due to variations in threshold voltage and the like of the resistors and the transistors constituting the circuit.
SUMMARY OF THE INVENTION
The present invention is intended to solve the above problem and it is an object of the present invention to provide a bias circuit which outputs such a bias voltage as to be an originally-set saturation voltage which is generated on the basis of a reference voltage which is externally received and by using an already-outputted bias voltage which is fed back for avoiding an effect of variations in element performance caused in a manufacturing process and an A/D converter which includes the bias circuit and is therefore capable of setting an input range with accuracy.
The bias circuit in accordance with the present invention includes saturation voltage detector means for detecting a saturation voltage from a bias voltage which is fed back to generate an input voltage and operational amplifier means receiving the input voltage outputted from the saturation voltage detector means, for generating a bias voltage by using a reference voltage which is externally inputted.
Therefore, according to the present invention, it is possible to produce an effect of allowing an output of a bias voltage having an accurate value on the basis of the reference voltage, without any effect of variations in circuit elements.
Further, the A/D converter in accordance with the present invention includes a bias circuit which has saturation voltage detector means for detecting a saturation voltage from a bias voltage which is fed back to generate an input voltage and operational amplifier means receiving a reference voltage generated by reference voltage generator means and the input voltage generated by the saturation voltage detector means to generate a bias voltage, the bias circuit for supplying the bias voltage to a plurality of preamplifiers on the basis of the reference voltage.
Therefore, according to the present invention, it is possible to obtaining the bias voltage having an accurate value on the basis of the reference voltage, and this produces an effect that an input range of the A/D converter can be appropriately set to compensate performance degradation due to variations in circuit elements.
Furthermore, the A/D converter in accordance with the present invention includes a bias circuit which has saturation voltage detector means for detecting a saturation voltage from a bias voltage which is fed back to generate an input voltage and operational amplifier means receiving a reference voltage generated by reference voltage generator means and the input voltage generated by the saturation voltage detector means to generate a bias voltage, the bias circuit for supplying the bias voltage to a plurality of folding amplifiers on the basis of the reference voltage.
Therefore, according to the present invention, it is possible to produce an effect that an input range of the A/D converter can be appropriately set to compensate performance degradation due to variations in circuit elements.


REFERENCES:
patent: 5838192 (1998-11-01), Bowers et al.
patent: 6091285 (2000-07-01), Fujiwara
Gray, Paul R., et al., Analysis and Design of Analog Integrated Circuits, Fourth Edition. New York: Wiley, 2001, pp. 309-312.
Nauta, Bram, et al., “A 70-MS/s 110-mW 8-b CMOS Folding and Interpolating A/D Converter.” IEEE Journal of Solid-State Circuits, vol. 30, No. 12, Dec. 1995, pp. 1302-1308. (Manuscript received May 10, 1995; revised Aug. 27, 1995).

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