Bias boost circuit for television receiver

Details Bias boost circuit for television receiver Bias boost circuit for television receiver

1978-06-02

1980-03-11

Stewart, David L.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358184, 358188, H04N 318

Patent

active

041930940

ABSTRACT:
A bias boost circuit for a television receiver is disclosed, comprising a timing circuit for providing an exponentially decreasing bias to a video amplifier of the television receiver for a period of time corresponding to the initial warmup of the TV receiver, i.e. until the various amplifier and display portions are ready to display a high brightness image. The timing circuit comprises an RC circuit coupled to a power source of the TV receiver, whereby upon turn-on of the TV receiver the source's voltage is applied to the timing circuit, i.e. to its capacitor, to provide a decreasing voltage bias to the base of a transistor, whereby the transistor is gradually turned off thus decreasing exponentially a bias boost signal that is applied to the video amplifier and in particular, to its first stage.

REFERENCES:
patent: 3339105 (1967-08-01), Busse
patent: 3535445 (1970-10-01), Griffery
patent: 4127875 (1978-11-01), Fernsler
patent: 4129885 (1978-12-01), Chovanel

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