Bi-processor data handling system including automatic control of

Communications: electrical – Digital comparator systems

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Details

235153AE, G06F 1100, G06F 1516, G06F 1546

Patent

active

040127176

ABSTRACT:
Two microprogrammed processors of identical hardware and software facilities are synchronously operated for exchange operations with a plurality of external store and peripheral units. The exchange connections from the processors to the external units pass through gate circuits one of which only is operative at a time. Each processor has an output at which all processed words, whether instructions, microinstructions, operands or results are successively available. Comparator means permanently compare such words from the two processors and, when a mismatch occurs, block the gate circuits and their own comparison outputs and control execution in both processors of a failure detection and check up routine. Each processor includes exchange control claiming and exchange control disclaiming outputs. When a processor activates its exchange control disclaiming output, its gate means are blocked, the output of the comparator means is inhibited and the other processor is automatically qualified to proceed with the exchanges. Casually, the processors are then desynchronized.

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