Fishing – trapping – and vermin destroying
Patent
1992-06-25
1993-08-24
Wojciechowicz, Edward
Fishing, trapping, and vermin destroying
437 20, 437 63, 437162, 437192, 437193, 437233, 437235, 437248, 257378, 257382, H01L 21265, H01L 2702
Patent
active
052388506
ABSTRACT:
A Bi-MOS type semiconductor integrated circuit device having at least one bipolar transistor in an island region is provided. The island region is covered with a multilayer insulating film which is formed of a silicon oxide film and a silicon nitride film having a different etching resistance with each other. Collector and base contact holes and an intended emitter contact hole are formed in the multilayer insulating film at the same time to provide bipolar transistors having a fine structure. An insulated gate MOS transistor includes a protective film such as polysilicon film covering a gate insulating film to increase the reliability.
REFERENCES:
patent: 4978626 (1990-12-01), Poon et al.
patent: 4984042 (1991-01-01), Pfiester et al.
patent: 5023690 (1991-06-01), Verret et al.
patent: 5148252 (1992-09-01), Taka
Matsunaga Taira
Yamaki Bunshiro
Kabushiki Kaisha Toshiba
Wojciechowicz Edward
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