Bi-MOS PLA

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307446, 307459, 307477, H03K 1902, H03K 19091, G06F 738

Patent

active

047257458

ABSTRACT:
An integrated programmable logic array formed within a single silicon chip comprises a combination of a logical product gate array and a logical summation gate array. The logical product gate array is equipped with a plurality of MIS field-effect transistors whose gates are selectively driven by a plurality of input signals. Source-drain paths of these transistors are connected in series. The logical summation gate array is equipped with a plurality of inverted bipolar transistors having collector-emitter paths which are connected in parallel.

REFERENCES:
"Low-Power Blended Transistor Logic Circuit", I.B.M. Tech. Disc. Bul., vol. 17, No. 10, Mar. 1975.

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