Bi-MOS buffer circuit

Details Bi-MOS buffer circuit Bi-MOS buffer circuit

1984-12-17

1987-09-15

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307446, 307451, 307270, 307570, H03K 19092, H03K 1902, H03K 1920, H03K 301

Patent

active

046942025

ABSTRACT:
An improved buffer circuit is provided having an output stage for driving a load and a driver stage for driving said output stage. The output stage is constituted by a first MOS transistor to avoid problems found in bipolar output transistors which result from the amplitude of the output stage being influenced by the voltage V.sub.be of such output bipolar transistors. The driver stage, on the other hand, is formed of a bipolar transistor-MOS transistor composite logic cirucit. This driver stage includes an output circuit having a bipolar transistor for driving said first MOS transistor, and an input circuit including a second MOS transistor responsive to a predetermined input for rendering said bipolar transistor in the on or off state. The channel size of said first MOS transistor is larger than that of said second MOS transistor to give a device having an improved high operating speed.

REFERENCES:
patent: 3290653 (1966-12-01), Slattery et al.

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