Bi-level image display signal processing apparatus

Details Bi-level image display signal processing apparatus Bi-level image display signal processing apparatus

1987-12-21

1990-01-02

Groody, James J.

Facsimile and static presentation processing

Facsimile

Specific signal processing circuitry

358464, H04N 140

Patent

active

048917109

ABSTRACT:
An image signal processing circuit for converting step-gradation density values (I.sub.xy) of successive picture elements to bi-level values (P.sub.xy) for display by a bi-level display device, in which a bi-level error (E.sub.xy) between a bi-level value determined for a picture element and an appropriate density value for the element is apportioned among a set of peripherally adjacent picture elements (A to D) by computing a corresponding set of error apportionment values (G.sub.A to G.sub.D), and in which a difference between the sum total of these apportionment values and the bi-level error is derived, and error apportionment is modified such as to eliminate the effects of this difference. Improved reproduction is thereby attained of image regions which are of uniformly high density or low density.

REFERENCES:
patent: 4339774 (1982-07-01), Temple
patent: 4449150 (1984-05-01), Kato
patent: 4654721 (1987-03-01), Goertzel et al.
patent: 4692811 (1987-09-01), Tsuchiya et al.
"An Adaptive Algorithm for Spatial Grey Scale" by Robert Floyd & Louis Steinberg; SID 75 DIGEST p. 36.
Proceedings of the S.I.D., vol. 24, No. 3, 1983, pp. 253-258, SID, Los Angeles, CA, US; C. Billotet-Hoffmann et al.: "On the error diffusion technique for electronic halftoning" p. 254.

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