Bi-directional signal buffering circuit

Details Bi-directional signal buffering circuit Bi-directional signal buffering circuit

1992-03-20

1993-05-25

Hudspeth, David R.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307473, 307475, 307242, H03K 1901

Patent

active

052143309

ABSTRACT:
When a signal A is input to a bi-directional buffer from a bus A, a first buffer detects the level of the signal A and supplies an OE control signal to a second buffer to disable an output therefrom. The output from the second buffer is set to a predetermined value by a bias circuit, and this predetermined value is supplied to the bi-directional buffer as a direction control signal via a direction designator together with output signal from the first buffer. In this circuit operation, when the signal A is input to the bi-directional buffer, it is immediately transmitted from the bus A side to the bus B side since the bi-directional buffer is set in an initial state by the bias circuit so as to transmit a signal in two directions.

REFERENCES:
patent: 3769525 (1973-10-01), Foss et al.
patent: 4154978 (1979-05-01), Tu
patent: 4315167 (1982-02-01), Pelc
patent: 4419592 (1983-12-01), Norgren et al.
patent: 4446382 (1984-05-01), Moore et al.
patent: 4621202 (1986-11-01), Pumo
patent: 4695740 (1987-09-01), Carter
patent: 4835418 (1989-05-01), Hsieh
patent: 4987319 (1991-01-01), Kawana
patent: 5107148 (1992-04-01), Millman

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