Bi-directional shift-register circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Shift register – Shift direction control

Reexamination Certificate

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Details

C377S070000, C377S079000

Reexamination Certificate

active

06778626

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates in general to a shift-register circuit. In particular, the present invention relates to a bi-directional shift-register circuit for driving a liquid crystal display.
2. Description of the Related Art
A frame of a liquid crystal display (LCD) is generated by a plurality of pixels of the matrices. Thus, sequential pulses are basic signals driving the LCD. In addition, the sequential pulses are generated by shift-register circuit, so the shift register circuit becomes a general unit for the driving circuit of LCD.
FIG. 1
shows a conventional shift-register circuit Only three stages of shift-register units are shown in
FIG. 1 and a
plurality of shift-register units comprise a shift-register circuit. The input signals of the (N−1)th-stage shift-register unit
100
are the output signal (N−2)OUT of the (N−2)th-stage shift-register unit and the output signal (N)OUT of the (N)th-stage shift-register unit
102
. The input signals of the (N)th-stage shift-register unit
102
are the output signal (N−1)OUT of the (N−1)th-stage shift-register unit
100
and the output signal (N+1)OUT of the (N+1)th-stage shift-register unit
104
. The input signals of the (N+1)th-stage shift-register unit
104
are the output signal (N)OUT of the (N)th-stage shift-register unit
102
and the output signal (N+2)OUT of the (N+2)th-stage shift-register unit. In addition, the adjacent shift-register units receive inverted clock signals (CLK or {overscore (CLK)}). Accordingly, each shift-register unit operates according to the output signal of the pre-stage shift-register unit and the next-stage shift-register unit and outputs data according to the voltage level of the clock signal.
FIG. 2
shows a timing chart of the conventional shift-register unit. The output of the shift-register unit
100
is labeled (N−1)OUT, the output of the shift-register unit
102
is labeled (N)OUT and the output of the shift-register unit
104
is labeled (N+1)OUT. The data output from each shift-register units is delayed by a half clock period. Thus, the requirement of the shift-register circuit is achieved.
However, single scanning turn is not satisfied by the entire requirement of the LCD products. For example, some display types of digital camera are rotated according to the placement angle of the camera. In addition, some LCD monitors comprise the function of rotating the monitor, so LCD display with different scanning turns is required. Therefore, the shift-register circuit with different signal outputting turn is also required.
SUMMARY OF THE INVENTION
The object of the present invention is thus to provide a bi-directional shift-register circuit outputting data in multi-direction turns.
To achieve the above-mentioned object, the present invention provides a bi-directional shift-register circuit for outputting data in different turns according to a clock signal, an inverted clock signal and a switching signal. The first shift-register unit includes a first-stage first input terminal, a first-stage second input terminal, a first-stage output terminal and a first-stage clock input terminal for receiving the clock signal. The second shift-register unit includes a second-stage first input terminal, a second-stage second input terminal, a second-stage output terminal and a second-stage clock input terminal for receiving the inverted clock signal. The third shift-register unit includes a third-stage first input terminal, a third-stage second input terminal, a third-stage output terminal and a third-stage clock input terminal for receiving the clock signal. The first switching circuit is coupled to the first-stage output terminal, the third-stage output terminal and the switching signal and outputs the signal of the first-stage output terminal to the second-stage first input terminal and outputs the signal of the third-stage output terminal to the second-stage second input terminal when the switching signal is at a first voltage level, and outputs the signal of the third-stage output terminal to the second-stage first input terminal and outputs the signal of the first-stage output terminal to the second-stage second input terminal when the switching signal is at a second voltage level.


REFERENCES:
patent: 5717351 (1998-02-01), Katsutani
patent: 5859630 (1999-01-01), Huq
patent: 6678315 (2004-01-01), Hikita et al.

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