Bi-directional interface circuit of reduced signal alteration

Miscellaneous active electrical nonlinear devices – circuits – and – Gating – Diverging with single input and plural outputs

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326105, 341143, H03K 190175

Patent

active

059173645

ABSTRACT:
To provide a bi-directional interface circuit which can reduce the simultaneous switching noise and the power consumption even at transitions of the signal direction, a bi-directional interface circuit of the invention comprises: an encoder (10) for generating an output bit sequence in synchronous with a clock cycle of the bus lines, said output bit sequence being obtained by coding an original signal and a redundant bit so that signal alteration rate of the output bit sequence to a preceding bit sequence thereof is less than a half; a decoder (20) for decoding the input bit sequence into an original bit sequence; and bypass lines (3) for bypassing the input bit sequence to the encoder for enabling the encoder to refer to the input bit sequence as the preceding bit sequence when the LSI chip begins to transfer the original signal. By providing a first encoder for generating an intermediate bit sequence having less than half logic `1` bits, and a second encoder for switching bit logic when corresponding bit of the intermediate bit sequence is logic `1`, the signal delay of the bypassed input bit sequence can be reduced and I/O clock frequency is not restricted.

REFERENCES:
patent: 5384808 (1995-01-01), Van Brunt et al.
patent: 5726567 (1998-03-01), Lewis et al.
patent: 5805693 (1998-09-01), Chang et al.
Nakamura, Kazuyuki et al., "A 50% Noise Reduction Interface Using Low-Weight Coding ", 1996 Symposium on VLSI Circuits: Digest of Technical Papers; pp. 144-145 (1996).

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