Bi-directional buffering for memory data lines

Static information storage and retrieval – Interconnection arrangements

Reexamination Certificate

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Details

C365S233500

Reexamination Certificate

active

06882555

ABSTRACT:
Systems and methods are disclosed for implementing configuration memory on a programmable logic device. For example, in accordance with one embodiment of the present invention, bi-directional buffers are implemented between sections of a column of memory. The buffers may provide buffering for data lines extending through the column of memory.

REFERENCES:
patent: 5870410 (1999-02-01), Norman et al.
patent: 6038627 (2000-03-01), Plants
patent: 6292021 (2001-09-01), Furtek et al.
patent: 6664807 (2003-12-01), Crotty et al.

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