Bi-CMOS voltage level conversion circuit

Details Bi-CMOS voltage level conversion circuit Bi-CMOS voltage level conversion circuit

1987-03-10

1988-11-29

Heyman, John S.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307446, 307570, H03K 19092, H03K 1716, H03K 1902, H03K 1760

Patent

active

047884592

ABSTRACT:
In the output circuit a signal from an internal circuit is supplied to the gate of an N-channel type MOS transistor, a node of two resistors connected in series across a power supply terminal and ground is connected to one end of the MOS transistor. An NPN transistor is connected at its base to the node, at its collector to the power supply terminal and at its emitter to an output terminal. The positive polarity terminal of a power supply is connected to the power supply terminal to supply a positive voltage V.sub.CC and the negative polarity terminal of another power supply is connected through a load resistor to the output terminal to supply a negative voltage.

REFERENCES:
patent: 4176272 (1979-11-01), Powers
patent: 4437171 (1984-03-01), Hudson et al.
patent: 4453095 (1984-06-01), Wrathall
D. A. Hodges et al., "Interfacing," Analysis and Design of Digital Integrated Circuits, Chap. 7, Sec. 7, 1983.

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