Bi CMOS/SOI process flow

Details Bi CMOS/SOI process flow Bi CMOS/SOI process flow

1990-09-17

1991-09-17

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 57, 437 31, 437 56, 148DIG9, 148DIG150, H01L 21265

Patent

active

050495135

ABSTRACT:
The invention provides a bipolar transistor structure on a buried oxide layer for use in an integrated circuit and a method for fabricating the same. The invention may be incorporated into a method for fabricating bipolar transistors in a BiCMOS structure. The bipolar transistor is constructed in two stacked epitaxial layers. The first epitaxial layer is used to form both the MOSFET and the buried collector of the bipolar transistor. The second epitaxial layer is grown as a blanket epitaxial layer. The intrinsic collector and the base of the bipolar transistor are formed in the second epitaxial layer. An oxide layer is formed over the base. The emitter is formed of a polysilicon layer which is deposited through an opening in the oxide layer such that the polysilicon layer contacts the second epitaxial layer.

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patent: 4899202 (1990-02-01), Blake et al.
patent: 4906587 (1990-03-01), Blake
Thin Film Silicon: Preparation, Properties, and Device Applications, Allison et al.; IEEE, vol. 57, No. 9; 9/69; pp. 1490-1498.

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