Bi-CMOS integrated circuit device having a high speed lateral bi

Details Bi-CMOS integrated circuit device having a high speed lateral bi Bi-CMOS integrated circuit device having a high speed lateral bi

1990-04-23

1991-09-03

James, Andrew J.

357 35, 357 34, H01L 2702, H01L 2972

Patent

active

050459120

ABSTRACT:
Disclosed herein is a Bi-CMOS integrated circuit device including NPN and PNP bipolar transistors and N-channel and P-channel MOS transistor. The PNP transistor is formed in an epitaxial layer formed on a semiconductor substrate and has a collector region selectively formed in the epitaxial layer, a base region formed to straddle respective portions of the collector region and the epitaxial region and an emitter region selectively formed in the base region.

REFERENCES:
patent: 4510676 (1985-04-01), Anantha et al.
patent: 4609929 (1986-09-01), Jayaraman et al.
patent: 4829356 (1989-05-01), Arndt
Websters II Dictionary, p. 1144, 1984.

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