BI-CMOS driver circuit

Details BI-CMOS driver circuit BI-CMOS driver circuit

1984-09-04

1986-10-07

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, 307454, 307570, H03K 1901, H03K 19082, H03K 19094

Patent

active

046161465

ABSTRACT:
A BI-CMOS circuit is provided wherein an output terminal is coupled between an upper and lower NPN push-pull transistor. This provides high current drive capability along with no d.c. power dissipation. A P-channel device has a source and a drain connected to the collector and base, respectively, of the upper NPN transistor. An N-channel device has a source and drain connected to the base and collector, respectively, of the lower NPN transistor. The gates of the P-channel and N-channel devices are connected to an input terminal and provide a high impedance thereat. Additional N-channel devices are coupled between the bases of the upper and lower NPN transistors and a supply voltage terminal for improving the switching speed of the output signal.

REFERENCES:
Lin et al., "Complementary MOS-Bipolar Transistor Structure", IEEE Trans. Electron Devices, vol. ED-16, No. 11, Nov. 1969, pp. 945-951.

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