Benchtop processing

Details Benchtop processing Benchtop processing

2002-04-15

2004-03-23

Niebling, John (Department: 2812)

Metal working

Barrier layer or semiconductor device making

C414S935000

Reexamination Certificate

active

06709470

ABSTRACT:

BACKGROUND
1. Field of Invention
This invention generally relates to semiconductor manufacturing and, more particularly, to an apparatus and method for rapid thermal processing of a semiconductor wafer.
2. Related Art
New processing and manufacturing techniques are continuously being developed to make further advancements in the development of semiconductor devices, especially semiconductor devices of decreased dimensions. One such processing technique is know as Rapid Thermal Processing (RTP), which reduces the amount of time that a semiconductor device is exposed to high temperatures during processing. The RTP technique typically includes irradiating the semiconductor device or wafer with sufficient power to quickly raise the temperature of the wafer and hold it at that temperature for a time long enough to successfully perform a fabrication process, while avoiding such problems as unwanted dopant diffusion that would otherwise occur at the high processing temperatures.
What is needed is an easily accessible and efficient apparatus and method for wafer processing, including such techniques as RTP, that occupies minimal space.
SUMMARY
In accordance with an embodiment of the present invention, a processing system that is compact and capable of being placed in a small space, for example, atop a clean room laboratory bench, is provided. An operator can manually place wafers on a wafer receptacle within a wafer reception module. Once in position, the wafers are moved from within the wafer reception module to the processing module for processing.
In one embodiment, a benchtop processing system includes a wafer receptacle having a plurality of sloped projections capable of receiving a plurality of wafers, a wafer reception module housing the wafer receptacle in a first position, and a processing chamber operably coupled to the wafer reception module. The processing chamber defines an internal space which receives the wafer receptacle when the wafer receptacle is in a second position.
In another embodiment, a wafer receptacle includes a plurality of sloped projections capable of receiving a plurality of semiconductor wafers having different diameters, and a bottom slot for receiving a wafer to diffuse heat.
In yet another embodiment, a method of wafer processing discloses the use of a benchtop processing system in accordance with the present invention.
These and other features and advantages of the present invention will be more readily apparent from the detailed description of the preferred embodiments set forth below taken in conjunction with the accompanying drawings.


REFERENCES:
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patent: 5716207 (1998-02-01), Mishina et al.
patent: 5837555 (1998-11-01), Kaltenbrunner et al.
patent: 6139641 (2000-10-01), Inokuchi et al.
patent: 6168427 (2001-01-01), Cho et al.
patent: 6303906 (2001-10-01), Yoo

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