Behavioral synthesis for reconfigurable datapath structures

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364488, 364578, 371 225, G06F 1750

Patent

active

055026451

ABSTRACT:
High level synthesis of datapaths has traditionally concentrated on synthesizing a specific implementation for a given computational problem. Methods to compose a reconfigurable BISR (built-in-self-repair) implementation with a minimum amount of area overhead are disclosed. Previously the BISR scope has been restricted to the substitution of operation modules with only those of the same type. Novel resource allocation, assignment and scheduling and transformation methods, primarily for ASIC designs, are described. These methods are based on the exploration of the design solution space accomplished by use of high level synthesis processes to find designs where resources of several different types can be backed up with the same unit.

REFERENCES:
patent: 4922432 (1990-05-01), Kobayashi et al.
patent: 5036473 (1991-07-01), Butts et al.
patent: 5133069 (1992-07-01), Asato et al.
patent: 5274793 (1993-12-01), Kuroda et al.

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