Pulse or digital communications – Synchronizers – Frequency or phase control using synchronizing signal
Reexamination Certificate
1998-03-09
2001-07-17
Chin, Stephen (Department: 2634)
Pulse or digital communications
Synchronizers
Frequency or phase control using synchronizing signal
C370S305000, C370S470000, C370S506000
Reexamination Certificate
active
06263033
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The apparatus and method according to the invention pertains to microcontrollers, and more specifically, to a microcontroller providing more accurate asynchronous serial port transmit baud rates.
2. Description of the Related Art
Although consumers readily recognize the impact of personal computers in our society, they may be less aware of other manifestations of microcomputers within everyday life. Industrial and consumer products often require dedicated intelligence of their own, and to this end, the same technology that powers a personal computer has found its way into everyday industrial and consumer goods, such as cellular phones, televisions, stereo systems, and a wide variety of other products. Similarly, scientific instrumentation, communications systems, and control systems invariably include microcontrollers.
A centerpiece of this technology is known as a microcontroller, or embedded controller, which in effect is a microprocessor as used in a personal computer, but with a great deal of additional functionality combined onto the same monolithic semiconductor substrate (i.e., chip). In a typical personal computer, the microprocessor performs the basic computing functions, but other integrated circuits perform functions such as communicating over a network, controlling the computer memory, and providing input/output with the user.
In a typical microcontroller, many of these functions are embedded within the integrated circuit chip itself. A typical microcontroller, such as the Am186EM by Advanced Micro Devices, Inc., of Sunnyvale, Calif., not only includes a core microprocessor, but further includes a memory controller, a direct memory access (DMA) controller, an interrupt controller, and both asynchronous and synchronous serial interfaces. In computer systems, these devices are typically implemented as separate integrated circuits, requiring a larger area and increasing the size of the product. By embedding these functions within a single chip, size and cost are reduced, often important in consumer products.
From a consumer products designer's viewpoint, often the particular combination of added features make a particular microcontroller attractive for a given application. Many microcontrollers are available that use the standard 80×86 microprocessor instructions, allowing for software to be easily developed for such microcontrollers. Because of the similar execution unit instruction sets, the added features often become principal differentiating criteria between particular microcontrollers.
An asynchronous serial communications port is one such common additional feature in a microcontroller. An asynchronous serial link allows the microcontroller to communicate with other devices or over data lines by sequentially sending and receiving bits of data. The “asynchronous” nature indicates these ports do not provide a separate clock signal to clock the data. Instead, the rate at which data is sent and received must be predetermined or prenegotiated, and independently controlled on both the sending and receiving ends. This data rate is known as the baud rate, which is the inverse of one bit period. The baud rate is generally one of a number of predefined rates, which are standard within the industry. Such rates include 1200, 2400, 4800, 9600, 19.2K, 28.8K, 33.3K, and 54K baud and high data transfer rates.
In an asynchronous serial communications link, data is typically digitally transmitted by first sending a start bit, which begins with a falling data signal and lasts for the bit period at the transmit baud rate. The start bit is then followed by data bits, typically 7, 8, or 9, again each data bit lasting for one bit period. After an optional parity bit, a stop bit is sent by driving the data line high for one, one and one half, or two bit periods. The next data item then follows beginning with another start bit or the data line remains high for an indeterminate amount of time indicating no data. A typical data format is one start bit, 8 data bits, no parity bit, and one stop bit, which is commonly referred to as N-8-1 format (no parity, eight data, one stop bit). The transmission of an entire data item—start bit, data and parity, then stop bit—is commonly referred to as one frame.
Although some variation from the ideal baud rate may be permissible, it is generally desirable to transmit as close to the ideal baud rate as possible. For example, at 33.3K baud, one bit period should equal 30 microseconds. Over 10 bit periods, which form a frame in N-8-1 format, the bit period clock, or the length of time per bit, can differ between transmitter and receiver by at most ½ of a bit period, which is a 5% clock variation for ten bits. If this theoretical limit is exceeded, data will be lost. This is because after the falling edge of the start bit, the receiver samples each received data bit around the center of its bit period. But after 10 bit periods, should the transmit and receive clocks differ by over 5%, the receiver will sample the stop bit outside of the transmitted bit period for that stop bit. This is further explained below with respect to FIG.
4
.
Further, when a continuous stream of data is being asynchronously received, the receiver does not necessarily restart its internal state machine based on each new start bit. After a stop bit is sampled at the appropriate point, some receivers wait until the stop bit should end before detecting whether another start bit has begun. If, at that point, the receiver detects that the start bit for a new frame has begun, the receiver samples the start bit one-half bit period later (to ensure it is not a spurious line drop), and then samples the frame's data, parity, and stop bits at appropriate points. This, however, can cause a cumulative error in which the center sample points gradually shift over a sequence of frames. This situation is generally inconsequential in discretely implemented asynchronous serial communications devices, because such devices typically have their own clocks and crystals, and thus can be accurately set to transmit and receive at particular baud rates. But when an asynchronous serial port is implemented as part of a microcontroller, it is preferable to use the microcontroller processor clock to create the asynchronous serial clock rather than provide a separate clock and crystal strictly for the serial port. Such a crystal would require the use of additional pins and additional components. Therefore, such asynchronous serial port clocks are typically implemented by dividing the processor clock by a certain factor, and then using that divided processor clock as the serial clock. The serial clock is selected such that each bit period of the asynchronous serial port, at the selected baud rate, contains a predetermined number of phases of the serial clock, such as 16 or 32. This permits the receiver to determine appropriate center points for sampling, to accurately synchronize with the start bit, and to sample the more than one point in a bit period for noise reduction purposes.
A problem with using the processor clock to generate the serial clock, however, is that often it is impossible to divide the processor clock by an integer yielding an exactly appropriate serial clock. Instead, the actual bit period resulting from the derived serial clock will be off by some percentage from the ideal baud rate. This is acceptable when communicating with other systems similarly implemented, and is also acceptable when communicating with a system which itself runs at the ideal baud rate. But assume, for example, that a system is implemented in which the serial clock is 3% too fast. Such a system will have communications errors when attempting to communicate with a system whose serial clock is 3% too slow because multiple cumulative errors could exceed a ½-bit period in a 10-bit frame.
It would be desirable to implement an asynchronous serial port which operates more closely to the ideal baud rate even in a system in which the processor clo
Advanced Micro Devices , Inc.
Akin Gump Stauss Hauer & Feld, L.L.P.
Chin Stephen
Ha Dac V.
LandOfFree
Baud rate granularity in single clock microcontrollers for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Baud rate granularity in single clock microcontrollers for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Baud rate granularity in single clock microcontrollers for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2502329