Electricity: battery or capacitor charging or discharging – Battery or cell charging – With detection of current or voltage integral
Reexamination Certificate
2000-02-16
2001-04-24
Tso, Edward H. (Department: 2838)
Electricity: battery or capacitor charging or discharging
Battery or cell charging
With detection of current or voltage integral
Reexamination Certificate
active
06222348
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a battery pack and a battery system using this battery pack.
2. Description of the Related Art
The present applicant has previously proposed a charging device which is, upon charging a battery pack, capable of indicating a drive possible time of an electronic device using a battery cell being charged and its current charging capacity as shown in
FIGS. 1
to
4
.
This charging device will be described. In
FIG. 1
, reference numeral
1
denotes a charging device housed in an electronic device such as a video tape recorder having a built-in camera (hereinafter referred to as a video camera) or the like. Also, in
FIG. 1
, reference numeral
2
denotes an AC adapter
2
connected to a commercially-available power supply to supply the power to the video camera and the charging device
1
.
This charging device
1
includes a charging circuit
3
, a calculation processing microcomputer
5
and a display device
6
and this charging circuit
3
charges a battery cell
20
(see
FIG. 2
) of a battery pack
4
that is used to drive the video camera when a user carries the video camera. The charging circuit
3
is arranged as is well known in the prior art. This battery pack
4
includes at least a battery calculation processing means
4
a
for obtaining battery cell voltage detection information and charging current cumulated amount information and an a communication processing means
4
b
for communicating each of the information.
An example of this battery pack
4
is shown in FIG.
2
. Referring to
FIG. 2
, a positive electrode of the battery cell
20
of the battery pack
4
is connected to a plus terminal TM
1
of this battery pack
4
, and a negative electrode of the battery cell
20
is connected through a current detection resistor R
7
to a minus terminal TM
2
of this battery pack
4
. The plus terminal TM
1
and the minus terminal TM
2
are respectively connected to a plus terminal and a minus terminal at the output side of the charging circuit
3
of the charging device
1
.
The power from a microcomputer power supply
16
including a series regulator, a reset circuit or the like is supplied to a microcomputer
10
housed in the battery pack
4
. The microcomputer
10
is operated by the power supplied from this microcomputer power supply
16
. By the way, the microcomputer
10
has functions of the battery calculation processing means
4
a
and communication processing means
4
b
. A charging current detection input terminal D
11
of this microcomputer
10
is connected to an output terminal of an operational amplifier
13
provided to detect a charging current. A discharging current detection input terminal D
12
thereof is connected to an output terminal of an operational amplifier
14
provided to detect a discharging current. Both the operational amplifiers
13
and
14
detect charging and discharging currents based on the voltage difference across the current detecting resistor
7
.
An interrupt input terminal of the microcomputer
10
is connected to an output terminal of a 2-input NAND gate
15
having two input terminals connected to the respective output terminals of the operational amplifiers
13
and
14
. Further, the output terminal of the 2-input NAND gate
15
is connected through a pull-up resistor R
8
, for example, to a power supply terminal. Also, a temperature detection input terminal of the microcomputer
10
is connected to an output terminal of a temperature sensor
19
which detects an ambient temperature of the battery cell
20
. A voltage detection input terminal thereof is connected to an output terminal of a voltage detection circuit
18
which is used to detect a terminal voltage of the battery cell
20
. A ground terminal GND thereof is connected to the negative electrode of the battery cell
20
. An output and input terminal TMC used to communicate with the calculation processing microcomputer
5
, which comprises a computation means of the charging device
1
of the video camera as will be described later on, is connected to buffer amplifiers
11
and
12
.
Incidentally, analog input terminals such as the charging current detection input terminal D
11
, the discharging current detection input terminal D
12
, the temperature detection input terminal, the voltage detection input terminal and so on are all A/D input ports. Therefore, the microcomputer
10
houses an A/D converter for converting these analog input into digital form.
The voltage detection circuit
18
is formed of a voltage-dividing resistor comprising resistors R
9
and R
10
. A voltage across the battery cell
20
is detected by this voltage-dividing resistor. A voltage detection value from this voltage detection circuit
18
is supplied to the voltage detection input terminal of the microcomputer
10
. Accordingly, the microcomputer
10
is able to learn the terminal voltage across the battery cell
20
based on the voltage detection value supplied to this voltage detection input terminal from the voltage detection circuit
18
.
Also, the temperature sensor
19
is comprised of a suitable device such as a temperature detection thermistor or the like. The temperature sensor
19
is disposed in the vicinity of or in contact with the battery cell
20
, and a temperature detection value of this temperature sensor
19
is supplied to the temperature detection input terminal of the microcomputer
10
. Accordingly, the microcomputer
10
is able to learn a temperature of the battery cell
20
based on the temperature detection value supplied to this temperature detection input terminal.
Then, a non-inverting input terminal of the operational amplifier
13
is connected through a resistor R
3
to the negative electrode of the battery cell
20
, and an inverting input terminal thereof is connected through a current voltage detection resister R
7
to the negative electrode of the battery cell
20
and also to an amplification factor setting negative feedback resistor R
2
and a resistor R
1
. Accordingly, the operational amplifier
13
outputs from its output terminal a voltage value which results from amplifying a current value (current value flowing upon charging) flowing into the battery pack
4
in response to a ratio (R
2
/R
1
) of resistance values of the resistors R
1
and R
2
.
On the other hand, a non-inverting input terminal of the operational amplifier
14
is connected through a resistor R
6
and the current voltage detection resistor R
7
to the negative electrode of the battery cell
20
. An inverting input terminal thereof is connected to a negative feedback resistor R
5
and a resistor R
4
. Accordingly, the operational amplifier
14
outputs from its output terminal a voltage value which results from amplifying a current value (current value flowing upon discharging) flowing into the battery pack
4
in response to a ratio (R
5
/R
4
) of resistance values of the resistors R
4
and R
5
.
A transistor switch Tr
1
is comprised of a field-effect transistor, for example, and whose gate is connected to a switching control output terminal SW
1
of the microcomputer
10
. The resistor R
1
is connected between the drain and the source of this transistor switch Tr
1
. Accordingly, when the level of the signal from the switching control output terminal SW
1
of the microcomputer
10
goes to a high (H) level, for example, the transistor switch Tr
1
is turned ON, whereby the resistance value based on this resistor R
1
becomes approximately 0 (there is only the internal resistor of the transistor switch Tr
1
), thereby resulting in the amplification factor (amplifier gain) of the operational amplifier
13
whose amplification factor is set in response to the ratio (R
2
/R
1
) of the resistance values of the resistors R
1
and R
2
being increased.
On the other hand, when the level of the signal from the switching control output terminal SW
1
of the microcomputer
10
goes to a low (L) level, for example, the transistor switch Tr
1
is turned OFF, whereby the amplification factor of this o
Arakawa Hiroyuki
Higuchi Yoshinari
Okegawa Shuji
Sato Hideyuki
Frommer William S.
Frommer Lawrence & Haug LLP.
Polito Bruno
Sony Corporation
Tso Edward H.
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